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/Zephyr-Core-2.7.6/drivers/audio/
Dintel_dmic.h79 #define OUTCONTROL0_TIE(x) SET_BIT(27, x) argument
80 #define OUTCONTROL0_SIP(x) SET_BIT(26, x) argument
81 #define OUTCONTROL0_FINIT(x) SET_BIT(25, x) argument
82 #define OUTCONTROL0_FCI(x) SET_BIT(24, x) argument
83 #define OUTCONTROL0_BFTH(x) SET_BITS(23, 20, x) argument
84 #define OUTCONTROL0_OF(x) SET_BITS(19, 18, x) argument
85 #define OUTCONTROL0_NUMBER_OF_DECIMATORS(x) SET_BITS(17, 15, x) argument
86 #define OUTCONTROL0_IPM_SOURCE_1(x) SET_BITS(14, 13, x) argument
87 #define OUTCONTROL0_IPM_SOURCE_2(x) SET_BITS(12, 11, x) argument
88 #define OUTCONTROL0_IPM_SOURCE_3(x) SET_BITS(10, 9, x) argument
[all …]
/Zephyr-Core-2.7.6/drivers/sensor/fdc2x1x/
Dfdc2x1x.h61 #define FDC2X1X_REG_READ(x) (((x & 0xFF) << 1) | FDC2X1X_READ) argument
62 #define FDC2X1X_REG_WRITE(x) ((x & 0xFF) << 1) argument
63 #define FDC2X1X_TO_I2C_REG(x) ((x) >> 1) argument
67 #define FDC2X1X_CLK_DIV_CHX_FIN_SEL_SET(x) (((x) & 0x3) << 12) argument
68 #define FDC2X1X_CLK_DIV_CHX_FIN_SEL_GET(x) (((x) >> 12) & 0x3) argument
70 #define FDC2X1X_CLK_DIV_CHX_FREF_DIV_SET(x) ((x) & 0x1FF) argument
71 #define FDC2X1X_CLK_DIV_CHX_FREF_DIV_GET(x) (((x) >> 0) & 0x1FF) argument
74 #define FDC2X1X_STATUS_ERR_CHAN(x) (((x) >> 14) & 0x3) argument
75 #define FDC2X1X_STATUS_ERR_WD(x) (((x) >> 11) & 0x1) argument
76 #define FDC2X1X_STATUS_ERR_AHW(x) (((x) >> 10) & 0x1) argument
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/Zephyr-Core-2.7.6/soc/riscv/riscv-privilege/sifive-freedom/
Dfe310_prci.h22 #define ROSC_DIV(x) (((x) & 0x2F) << 0) argument
23 #define ROSC_TRIM(x) (((x) & 0x1F) << 16) argument
24 #define ROSC_EN(x) (((x) & 0x1) << 30) argument
25 #define ROSC_RDY(x) (((x) & 0x1) << 31) argument
27 #define XOSC_EN(x) (((x) & 0x1) << 30) argument
28 #define XOSC_RDY(x) (((x) & 0x1) << 31) argument
30 #define PLL_R(x) (((x) & 0x7) << 0) argument
32 #define PLL_F(x) (((x) & 0x3F) << 4) argument
33 #define PLL_Q(x) (((x) & 0x3) << 10) argument
34 #define PLL_SEL(x) (((x) & 0x1) << 16) argument
[all …]
Dfu740_prci.h30 #define PLL_R(x) (((x) & 0x3f) << 0) argument
31 #define PLL_F(x) (((x) & 0x1ff) << 6) argument
32 #define PLL_Q(x) (((x) & 0x7) << 15) argument
33 #define PLL_RANGE(x) (((x) & 0x7) << 18) argument
34 #define PLL_BYPASS(x) (((x) & 0x1) << 24) argument
35 #define PLL_FSE(x) (((x) & 0x1) << 25) argument
36 #define PLL_LOCK(x) (((x) & 0x1) << 31) argument
50 #define OUTDIV_PLLCKE(x) (((x) & 0x1) << 31) argument
55 #define CLKSEL_SEL(x) (((x) & 0x1) << 0) argument
68 #define COREPLLSEL_SEL(x) (((x) & 0x1) << 0) argument
Dfu540_prci.h24 #define PLL_R(x) (((x) & 0x3f) << 0) argument
25 #define PLL_F(x) (((x) & 0x1ff) << 6) argument
26 #define PLL_Q(x) (((x) & 0x7) << 15) argument
27 #define PLL_RANGE(x) (((x) & 0x7) << 18) argument
28 #define PLL_BYPASS(x) (((x) & 0x1) << 24) argument
29 #define PLL_FSE(x) (((x) & 0x1) << 25) argument
30 #define PLL_LOCK(x) (((x) & 0x1) << 31) argument
37 #define CORECLKSEL_CORECLKSEL(x) (((x) & 0x1) << 0) argument
/Zephyr-Core-2.7.6/drivers/sensor/adxl372/
Dadxl372.h83 #define ADXL372_REG_READ(x) (((x & 0xFF) << 1) | ADXL372_READ) argument
84 #define ADXL372_REG_WRITE(x) ((x & 0xFF) << 1) argument
85 #define ADXL372_TO_I2C_REG(x) ((x) >> 1) argument
89 #define ADXL372_POWER_CTL_INSTANT_ON_TH_MODE(x) (((x) & 0x1) << 5) argument
91 #define ADXL372_POWER_CTL_FIL_SETTLE_MODE(x) (((x) & 0x1) << 4) argument
93 #define ADXL372_POWER_CTL_LPF_DIS_MODE(x) (((x) & 0x1) << 3) argument
95 #define ADXL372_POWER_CTL_HPF_DIS_MODE(x) (((x) & 0x1) << 2) argument
97 #define ADXL372_POWER_CTL_MODE(x) (((x) & 0x3) << 0) argument
101 #define ADXL372_MEASURE_AUTOSLEEP_MODE(x) (((x) & 0x1) << 6) argument
103 #define ADXL372_MEASURE_LINKLOOP_MODE(x) (((x) & 0x3) << 4) argument
[all …]
/Zephyr-Core-2.7.6/include/toolchain/
Dxcc.h30 #define __INT8_C(x) x argument
34 #define INT8_C(x) __INT8_C(x) argument
38 #define __UINT8_C(x) x ## U argument
42 #define UINT8_C(x) __UINT8_C(x) argument
46 #define __INT16_C(x) x argument
50 #define INT16_C(x) __INT16_C(x) argument
54 #define __UINT16_C(x) x ## U argument
58 #define UINT16_C(x) __UINT16_C(x) argument
62 #define __INT32_C(x) x argument
66 #define INT32_C(x) __INT32_C(x) argument
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Dcommon.h120 #define Z_STRINGIFY(x) #x argument
124 #define _DO_CONCAT(x, y) x ## y argument
125 #define _CONCAT(x, y) _DO_CONCAT(x, y) argument
251 #define LOG2CEIL(x) \ argument
252 ((((x) <= 4) ? 2 : (((x) <= 8) ? 3 : (((x) <= 16) ? \
253 4 : (((x) <= 32) ? 5 : (((x) <= 64) ? 6 : (((x) <= 128) ? \
254 7 : (((x) <= 256) ? 8 : (((x) <= 512) ? 9 : (((x) <= 1024) ? \
255 10 : (((x) <= 2048) ? 11 : (((x) <= 4096) ? 12 : (((x) <= 8192) ? \
256 13 : (((x) <= 16384) ? 14 : (((x) <= 32768) ? 15:(((x) <= 65536) ? \
257 16 : (((x) <= 131072) ? 17 : (((x) <= 262144) ? 18:(((x) <= 524288) ? \
[all …]
/Zephyr-Core-2.7.6/soc/arm/st_stm32/common/
Dst_stm32_dt.h34 #define ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL(inst, x, i) \ argument
35 DT_INST_PINCTRL_BY_IDX(inst, x, i)
46 #define ST_STM32_DT_NODE_ID_FROM_PINCTRL(name, x, i) \ argument
47 DT_PINCTRL_BY_IDX(DT_NODELABEL(name), x, i)
58 #define ST_STM32_DT_INST_PINMUX(inst, x, i) \ argument
59 DT_PROP(ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL(inst, x, i), pinmux)
70 #define ST_STM32_DT_PINMUX(name, x, i) \ argument
71 DT_PROP(ST_STM32_DT_NODE_ID_FROM_PINCTRL(name, x, i), pinmux)
83 #define ST_STM32_DT_INST_FUNC(inst, x, i, function) \ argument
84 DT_PROP(ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL(inst, x, i), function)
[all …]
/Zephyr-Core-2.7.6/include/linker/
Dlinker-tool-mwdt.h21 #define ASSERT(x, y) argument
22 #define SUBALIGN(x) ALIGN(x) argument
24 #define LOG2CEIL(x) ((((x) <= 2048) ? 11 : (((x) <= 4096)?12:(((x) <= 8192) ? \ argument
25 13 : (((x) <= 16384) ? 14 : (((x) <= 32768) ? 15:(((x) <= 65536) ? \
26 16 : (((x) <= 131072) ? 17 : (((x) <= 262144) ? 18:(((x) <= 524288) ? \
27 19 : (((x) <= 1048576) ? 20 : (((x) <= 2097152) ? \
28 21 : (((x) <= 4194304) ? 22 : (((x) <= 8388608) ? \
29 23 : (((x) <= 16777216) ? 24 : (((x) <= 33554432) ? \
30 25 : (((x) <= 67108864) ? 26 : (((x) <= 134217728) ? \
31 27 : (((x) <= 268435456) ? 28 : (((x) <= 536870912) ? \
[all …]
/Zephyr-Core-2.7.6/drivers/i2s/
Di2s_cavs.h43 #define SSCR0_DSIZE(x) ((x) - 1) argument
52 #define SSCR0_SCR(x) ((x) << 8) argument
57 #define SSCR0_FRDC(x) (((x) - 1) << 24) argument
102 #define SSPSP_SCMODE(x) ((x) << 0) argument
103 #define SSPSP_SFRMP(x) ((x) << 2) argument
105 #define SSPSP_STRTDLY(x) ((x) << 4) argument
106 #define SSPSP_DMYSTRT(x) ((x) << 7) argument
107 #define SSPSP_SFRMDLY(x) ((x) << 9) argument
108 #define SSPSP_SFRMWDTH(x) ((x) << 16) argument
109 #define SSPSP_DMYSTOP(x) ((x) << 23) argument
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/Zephyr-Core-2.7.6/lib/libc/minimal/include/
Dstdint.h97 #define __INT8_C(x) x argument
101 #define INT8_C(x) __INT8_C(x) argument
105 #define __UINT8_C(x) x ## U argument
109 #define UINT8_C(x) __UINT8_C(x) argument
113 #define __INT16_C(x) x argument
117 #define INT16_C(x) __INT16_C(x) argument
121 #define __UINT16_C(x) x ## U argument
125 #define UINT16_C(x) __UINT16_C(x) argument
129 #define __INT32_C(x) x argument
133 #define INT32_C(x) __INT32_C(x) argument
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/Zephyr-Core-2.7.6/samples/philosophers/src/
Dphil_obj_abstract.h53 #define fork_init(x) k_sem_init(x, 1, 1) argument
55 #define take(x) k_sem_take(x, K_FOREVER) argument
56 #define drop(x) k_sem_give(x) argument
69 #define fork_init(x) k_mutex_init(x) argument
71 #define take(x) k_mutex_lock(x, K_FOREVER) argument
72 #define drop(x) k_mutex_unlock(x) argument
83 #define fork_init(x) do { \ argument
84 k_stack_init(x, (void *)((x) + 1), 1); \
85 k_stack_push(x, MAGIC); \
88 #define take(x) do { \ argument
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/Zephyr-Core-2.7.6/soc/xtensa/intel_s1000/soc/
Dshim.h57 #define IPC_IDCTFC(x) (0x0 + x * IPC_DSP_OFFSET) argument
58 #define IPC_IDCTEFC(x) (0x4 + x * IPC_DSP_OFFSET) argument
59 #define IPC_IDCITC(x) (0x8 + x * IPC_DSP_OFFSET) argument
60 #define IPC_IDCIETC(x) (0xc + x * IPC_DSP_OFFSET) argument
79 #define IPC_IDCCTL_IDCIDIE(x) (0x100 << (x)) argument
80 #define IPC_IDCCTL_IDCTBIE(x) BIT(x) argument
151 #define SHIM_CLKCTL_LPGPDMAFDCGB(x) BIT(26 + x) argument
157 #define SHIM_CLKCTL_I2SFDCGB(x) BIT(20 + x) argument
160 #define SHIM_CLKCTL_I2SEFDCGB(x) BIT(18 + x) argument
163 #define SHIM_CLKCTL_TCPLCG_EN(x) BIT(16 + (x)) argument
[all …]
/Zephyr-Core-2.7.6/soc/xtensa/intel_adsp/cavs_v15/include/soc/
Dshim.h57 #define IPC_IDCTFC(x) (0x0 + x * IPC_DSP_OFFSET) argument
58 #define IPC_IDCTEFC(x) (0x4 + x * IPC_DSP_OFFSET) argument
59 #define IPC_IDCITC(x) (0x8 + x * IPC_DSP_OFFSET) argument
60 #define IPC_IDCIETC(x) (0xc + x * IPC_DSP_OFFSET) argument
79 #define IPC_IDCCTL_IDCIDIE(x) (0x100 << (x)) argument
80 #define IPC_IDCCTL_IDCTBIE(x) BIT(x) argument
151 #define SHIM_CLKCTL_LPGPDMAFDCGB(x) BIT(26 + x) argument
157 #define SHIM_CLKCTL_I2SFDCGB(x) BIT(20 + x) argument
160 #define SHIM_CLKCTL_I2SEFDCGB(x) BIT(18 + x) argument
163 #define SHIM_CLKCTL_TCPLCG_EN(x) BIT(16 + (x)) argument
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/Zephyr-Core-2.7.6/scripts/coccinelle/
Dnoderef.cocci17 expression *x;
24 x = <+... sizeof(
25 - x
26 + *x
29 f(...,(T)(x),...,sizeof(
30 - x
31 + *x
35 - x
36 + *x
37 ),...,(T)(x),...)
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/Zephyr-Core-2.7.6/soc/xtensa/intel_adsp/cavs_v25/include/soc/
Dshim.h41 #define IPC_IDCTFC(x) (0x0 + x * IPC_DSP_OFFSET) argument
42 #define IPC_IDCTEFC(x) (0x4 + x * IPC_DSP_OFFSET) argument
43 #define IPC_IDCITC(x) (0x8 + x * IPC_DSP_OFFSET) argument
44 #define IPC_IDCIETC(x) (0xc + x * IPC_DSP_OFFSET) argument
63 #define IPC_IDCCTL_IDCIDIE(x) (0x100 << (x)) argument
64 #define IPC_IDCCTL_IDCTBIE(x) BIT(x) argument
132 #define SHIM_CLKCTL_TCPLCG_EN(x) BIT(16 + (x)) argument
133 #define SHIM_CLKCTL_TCPLCG_DIS(x) 0 argument
152 #define SHIM_CLKCTL_DPCS_MASK(x) BIT(2) argument
191 #define SHIM_PWRCTL_TCPDSPPG(x) BIT(x) argument
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/Zephyr-Core-2.7.6/soc/xtensa/intel_adsp/cavs_v18/include/soc/
Dshim.h41 #define IPC_IDCTFC(x) (0x0 + x * IPC_DSP_OFFSET) argument
42 #define IPC_IDCTEFC(x) (0x4 + x * IPC_DSP_OFFSET) argument
43 #define IPC_IDCITC(x) (0x8 + x * IPC_DSP_OFFSET) argument
44 #define IPC_IDCIETC(x) (0xc + x * IPC_DSP_OFFSET) argument
63 #define IPC_IDCCTL_IDCIDIE(x) (0x100 << (x)) argument
64 #define IPC_IDCCTL_IDCTBIE(x) BIT(x) argument
132 #define SHIM_CLKCTL_TCPLCG_EN(x) BIT(16 + (x)) argument
133 #define SHIM_CLKCTL_TCPLCG_DIS(x) 0 argument
140 #define SHIM_CLKCTL_DPCS_MASK(x) BIT(2) argument
158 #define SHIM_CLKCTL_DPCS_MASK(x) BIT(2) argument
[all …]
/Zephyr-Core-2.7.6/soc/xtensa/intel_adsp/cavs_v20/include/soc/
Dshim.h41 #define IPC_IDCTFC(x) (0x0 + x * IPC_DSP_OFFSET) argument
42 #define IPC_IDCTEFC(x) (0x4 + x * IPC_DSP_OFFSET) argument
43 #define IPC_IDCITC(x) (0x8 + x * IPC_DSP_OFFSET) argument
44 #define IPC_IDCIETC(x) (0xc + x * IPC_DSP_OFFSET) argument
63 #define IPC_IDCCTL_IDCIDIE(x) (0x100 << (x)) argument
64 #define IPC_IDCCTL_IDCTBIE(x) BIT(x) argument
132 #define SHIM_CLKCTL_TCPLCG_EN(x) BIT(16 + (x)) argument
133 #define SHIM_CLKCTL_TCPLCG_DIS(x) 0 argument
152 #define SHIM_CLKCTL_DPCS_MASK(x) BIT(2) argument
191 #define SHIM_PWRCTL_TCPDSPPG(x) BIT(x) argument
[all …]
/Zephyr-Core-2.7.6/include/sys/
Dutil.h40 #define POINTER_TO_UINT(x) ((uintptr_t) (x)) argument
42 #define UINT_TO_POINTER(x) ((void *) (uintptr_t) (x)) argument
44 #define POINTER_TO_INT(x) ((intptr_t) (x)) argument
46 #define INT_TO_POINTER(x) ((void *) (intptr_t) (x)) argument
156 #define ROUND_UP(x, align) \ argument
157 (((unsigned long)(x) + ((unsigned long)(align) - 1)) & \
164 #define ROUND_DOWN(x, align) \ argument
165 ((unsigned long)(x) & ~((unsigned long)(align) - 1))
168 #define WB_UP(x) ROUND_UP(x, sizeof(void *)) argument
171 #define WB_DN(x) ROUND_DOWN(x, sizeof(void *)) argument
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Dmath_extras_impl.h26 #define use_builtin(x) 0 argument
28 #define use_builtin(x) HAS_BUILTIN(x) argument
188 static inline int u32_count_leading_zeros(uint32_t x) in u32_count_leading_zeros() argument
190 return x == 0 ? 32 : __builtin_clz(x); in u32_count_leading_zeros()
193 static inline int u32_count_leading_zeros(uint32_t x) in u32_count_leading_zeros() argument
197 for (b = 0; b < 32 && (x >> 31) == 0; b++) { in u32_count_leading_zeros()
198 x <<= 1; in u32_count_leading_zeros()
206 static inline int u64_count_leading_zeros(uint64_t x) in u64_count_leading_zeros() argument
208 return x == 0 ? 64 : __builtin_clzll(x); in u64_count_leading_zeros()
211 static inline int u64_count_leading_zeros(uint64_t x) in u64_count_leading_zeros() argument
[all …]
Dbyteorder.h20 #define __bswap_16(x) ((uint16_t) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8))) argument
21 #define __bswap_24(x) ((uint32_t) ((((x) >> 16) & 0xff) | \ argument
22 (((x)) & 0xff00) | \
23 (((x) & 0xff) << 16)))
24 #define __bswap_32(x) ((uint32_t) ((((x) >> 24) & 0xff) | \ argument
25 (((x) >> 8) & 0xff00) | \
26 (((x) & 0xff00) << 8) | \
27 (((x) & 0xff) << 24)))
28 #define __bswap_48(x) ((uint64_t) ((((x) >> 40) & 0xff) | \ argument
29 (((x) >> 24) & 0xff00) | \
[all …]
/Zephyr-Core-2.7.6/subsys/net/lib/sntp/
Dsntp_pkt.h20 #define SNTP_GET_LI(x) ((x & SNTP_LI_MASK) >> SNTP_LI_SHIFT) argument
21 #define SNTP_GET_VN(x) ((x & SNTP_VN_MASK) >> SNTP_VN_SHIFT) argument
22 #define SNTP_GET_MODE(x) ((x & SNTP_MODE_MASK) >> SNTP_MODE_SHIFT) argument
24 #define SNTP_SET_LI(x, v) (x = x | (v << SNTP_LI_SHIFT)) argument
25 #define SNTP_SET_VN(x, v) (x = x | (v << SNTP_VN_SHIFT)) argument
26 #define SNTP_SET_MODE(x, v) (x = x | (v << SNTP_MODE_SHIFT)) argument
/Zephyr-Core-2.7.6/samples/subsys/portability/cmsis_rtos_v1/philosophers/src/
Dphil_obj_abstract.h41 #define fork_init(x) osSemaphoreCreate(osSemaphore(##x), 1) argument
42 #define take(x) osSemaphoreWait(x, osWaitForever) argument
43 #define drop(x) osSemaphoreRelease(x) argument
55 #define fork_init(x) osMutexCreate(osMutex(##x)); argument
56 #define take(x) osMutexWait(x, 0) argument
57 #define drop(x) osMutexRelease(x) argument
/Zephyr-Core-2.7.6/samples/subsys/portability/cmsis_rtos_v2/philosophers/src/
Dphil_obj_abstract.h45 #define fork_init(x) osSemaphoreNew(1, 1, &sema_attr[x]) argument
46 #define take(x) osSemaphoreAcquire(x, osWaitForever) argument
47 #define drop(x) osSemaphoreRelease(x) argument
52 osMutexAttr_t mutex_attr[x] = {
61 #define fork_init(x) osMutexNew(&mutex_attr[x]) argument
62 #define take(x) osMutexAcquire(x, osWaitForever) argument
63 #define drop(x) osMutexRelease(x) argument

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