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Searched refs:DT_INST (Results 1 – 25 of 232) sorted by relevance

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/Zephyr-Core-2.7.6/drivers/display/
Ddisplay_ili9341.h78 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), gamset) == ILI9341_GAMSET_LEN, \
80 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), frmctr1) == ILI9341_FRMCTR1_LEN, \
82 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), disctrl) == ILI9341_DISCTRL_LEN, \
84 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl1) == ILI9341_PWCTRL1_LEN, \
86 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl2) == ILI9341_PWCTRL2_LEN, \
88 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl1) == ILI9341_VMCTRL1_LEN, \
90 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl2) == ILI9341_VMCTRL2_LEN, \
92 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pgamctrl) == ILI9341_PGAMCTRL_LEN, \
94 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ngamctrl) == ILI9341_NGAMCTRL_LEN, \
96 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrla) == ILI9341_PWCTRLA_LEN, \
[all …]
Ddisplay_ili9340.h54 .gamset = DT_PROP(DT_INST(n, ilitek_ili9340), gamset), \
55 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9340), frmctr1), \
56 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9340), disctrl), \
57 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9340), pwctrl1), \
58 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9340), pwctrl2), \
59 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9340), vmctrl1), \
60 .vmctrl2 = DT_PROP(DT_INST(n, ilitek_ili9340), vmctrl2), \
61 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9340), pgamctrl), \
62 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9340), ngamctrl), \
Ddisplay_ili9488.h48 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9488), frmctr1), \
49 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9488), disctrl), \
50 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9488), pwctrl1), \
51 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9488), pwctrl2), \
52 .vmctrl = DT_PROP(DT_INST(n, ilitek_ili9488), vmctrl), \
53 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9488), pgamctrl), \
54 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9488), ngamctrl), \
/Zephyr-Core-2.7.6/boards/arc/em_starterkit/
Darc_mpu_regions.c17 #if DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0
20 DT_REG_ADDR(DT_INST(0, arc_iccm)),
21 DT_REG_SIZE(DT_INST(0, arc_iccm)),
24 #if DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0
27 DT_REG_ADDR(DT_INST(0, arc_dccm)),
28 DT_REG_SIZE(DT_INST(0, arc_dccm)),
32 #if DT_REG_SIZE(DT_INST(0, mmio_sram)) > 0
35 DT_REG_ADDR(DT_INST(0, mmio_sram)),
36 DT_REG_SIZE(DT_INST(0, mmio_sram)),
/Zephyr-Core-2.7.6/drivers/clock_control/
Dclock_control_mcux_sim.c58 #if DT_NODE_HAS_STATUS(DT_INST(0, nxp_kinetis_ke1xf_sim), okay)
59 #define NXP_KINETIS_SIM_NODE DT_INST(0, nxp_kinetis_ke1xf_sim)
60 #define NXP_KINETIS_SIM_LABEL DT_LABEL(DT_INST(0, nxp_kinetis_ke1xf_sim))
61 #if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
63 DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
65 #if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
67 DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
70 #define NXP_KINETIS_SIM_LABEL DT_LABEL(DT_INST(0, nxp_kinetis_sim))
71 #define NXP_KINETIS_SIM_NODE DT_INST(0, nxp_kinetis_sim)
72 #if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_sim), clkout_source)
[all …]
/Zephyr-Core-2.7.6/boards/arm/particle_argon/
Dboard.h11 #define SKY_UFLn_GPIO_NAME DT_GPIO_LABEL(DT_INST(0, skyworks_sky13351), vctl1_gpios)
12 #define SKY_UFLn_GPIO_FLAGS DT_GPIO_FLAGS(DT_INST(0, skyworks_sky13351), vctl1_gpios)
13 #define SKY_UFLn_GPIO_PIN DT_GPIO_PIN(DT_INST(0, skyworks_sky13351), vctl1_gpios)
14 #define SKY_PCBn_GPIO_NAME DT_GPIO_LABEL(DT_INST(0, skyworks_sky13351), vctl2_gpios)
15 #define SKY_PCBn_GPIO_FLAGS DT_GPIO_FLAGS(DT_INST(0, skyworks_sky13351), vctl2_gpios)
16 #define SKY_PCBn_GPIO_PIN DT_GPIO_PIN(DT_INST(0, skyworks_sky13351), vctl2_gpios)
/Zephyr-Core-2.7.6/boards/arm/particle_xenon/
Dboard.h11 #define SKY_UFLn_GPIO_NAME DT_GPIO_LABEL(DT_INST(0, skyworks_sky13351), vctl1_gpios)
12 #define SKY_UFLn_GPIO_FLAGS DT_GPIO_FLAGS(DT_INST(0, skyworks_sky13351), vctl1_gpios)
13 #define SKY_UFLn_GPIO_PIN DT_GPIO_PIN(DT_INST(0, skyworks_sky13351), vctl1_gpios)
14 #define SKY_PCBn_GPIO_NAME DT_GPIO_LABEL(DT_INST(0, skyworks_sky13351), vctl2_gpios)
15 #define SKY_PCBn_GPIO_FLAGS DT_GPIO_FLAGS(DT_INST(0, skyworks_sky13351), vctl2_gpios)
16 #define SKY_PCBn_GPIO_PIN DT_GPIO_PIN(DT_INST(0, skyworks_sky13351), vctl2_gpios)
/Zephyr-Core-2.7.6/soc/arc/snps_emsk/
Dsoc_config.c21 #if DT_NODE_HAS_STATUS(DT_INST(0, ns16550), okay) in uart_ns16550_init()
22 sys_write32(0, DT_REG_ADDR(DT_INST(0, ns16550))+0x4); in uart_ns16550_init()
23 sys_write32(0, DT_REG_ADDR(DT_INST(0, ns16550))+0x10); in uart_ns16550_init()
25 #if DT_NODE_HAS_STATUS(DT_INST(1, ns16550), okay) in uart_ns16550_init()
26 sys_write32(0, DT_REG_ADDR(DT_INST(1, ns16550))+0x4); in uart_ns16550_init()
27 sys_write32(0, DT_REG_ADDR(DT_INST(1, ns16550))+0x10); in uart_ns16550_init()
Dlinker.ld27 #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
28 (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
29 #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
30 #define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
37 #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
38 (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
39 #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
40 #define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
/Zephyr-Core-2.7.6/soc/arm64/arm/fvp_aemv8a/
Dmmu_regions.c12 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
13 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
17 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
18 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
22 DT_REG_ADDR(DT_INST(0, arm_pl011)),
23 DT_REG_SIZE(DT_INST(0, arm_pl011)),
/Zephyr-Core-2.7.6/soc/arm64/xenvm/
Dmmu_regions.c13 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
14 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
18 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
19 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
23 DT_REG_ADDR(DT_INST(0, arm_sbsa_uart)),
24 DT_REG_SIZE(DT_INST(0, arm_sbsa_uart)),
/Zephyr-Core-2.7.6/soc/arm64/qemu_cortex_a53/
Dmmu_regions.c15 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
16 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
20 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
21 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
25 DT_REG_ADDR(DT_INST(0, arm_pl011)),
26 DT_REG_SIZE(DT_INST(0, arm_pl011)),
/Zephyr-Core-2.7.6/boards/arc/nsim/
Darc_mpu_regions.c26 #if DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0
29 DT_REG_ADDR(DT_INST(0, arc_iccm)),
30 DT_REG_SIZE(DT_INST(0, arc_iccm)),
33 #if DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0
36 DT_REG_ADDR(DT_INST(0, arc_dccm)),
37 DT_REG_SIZE(DT_INST(0, arc_dccm)),
/Zephyr-Core-2.7.6/boards/arc/emsdp/
Darc_mpu_regions.c15 DT_REG_ADDR(DT_INST(0, arc_iccm)),
16 DT_REG_SIZE(DT_INST(0, arc_iccm)),
20 DT_REG_ADDR(DT_INST(0, arc_dccm)),
21 DT_REG_SIZE(DT_INST(0, arc_dccm)),
25 DT_REG_ADDR(DT_INST(0, mmio_sram)),
26 DT_REG_SIZE(DT_INST(0, mmio_sram)),
/Zephyr-Core-2.7.6/soc/arc/snps_nsim/
Dlinker.ld15 #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
16 (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
17 #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
18 #define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
25 #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
26 (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
27 #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
28 #define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
/Zephyr-Core-2.7.6/soc/arc/snps_emsdp/
Dlinker.ld26 #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
27 (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
28 #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
29 #define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
36 #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
37 (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
38 #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
39 #define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
/Zephyr-Core-2.7.6/soc/arc/snps_arc_iot/
Dlinker.ld31 #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
32 (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
33 #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
34 #define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
40 #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
41 (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
42 #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
43 #define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
/Zephyr-Core-2.7.6/samples/drivers/watchdog/src/
Dmain.c25 #define WDT_NODE DT_INST(0, st_stm32_window_watchdog)
28 #define WDT_NODE DT_INST(0, st_stm32_watchdog)
35 #define WDT_NODE DT_INST(0, nordic_nrf_watchdog)
37 #define WDT_NODE DT_INST(0, espressif_esp32_watchdog)
39 #define WDT_NODE DT_INST(0, silabs_gecko_wdog)
41 #define WDT_NODE DT_INST(0, nxp_kinetis_wdog32)
43 #define WDT_NODE DT_INST(0, microchip_xec_watchdog)
45 #define WDT_NODE DT_INST(0, ti_cc32xx_watchdog)
/Zephyr-Core-2.7.6/include/arch/arm/aarch32/cortex_m/
Dnvic.h15 #define NVIC_NODEID DT_INST(0, arm_v8_1m_nvic)
17 #define NVIC_NODEID DT_INST(0, arm_v8m_nvic)
19 #define NVIC_NODEID DT_INST(0, arm_v7m_nvic)
21 #define NVIC_NODEID DT_INST(0, arm_v6m_nvic)
/Zephyr-Core-2.7.6/boards/arm/particle_boron/
Dboard.h11 #define SERIAL_BUFFER_ENABLE_GPIO_NAME DT_LABEL(DT_INST(0, nordic_nrf_gpio))
20 #define ANT_UFLn_GPIO_NAME DT_GPIO_LABEL(DT_INST(0, skyworks_sky13351), vctl1_gpios)
21 #define ANT_UFLn_GPIO_FLAGS DT_GPIO_FLAGS(DT_INST(0, skyworks_sky13351), vctl1_gpios)
22 #define ANT_UFLn_GPIO_PIN DT_GPIO_PIN(DT_INST(0, skyworks_sky13351), vctl1_gpios)
/Zephyr-Core-2.7.6/soc/arm64/nxp_layerscape/ls1046a/
Dmmu_regions.c14 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
15 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
19 DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
20 DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
/Zephyr-Core-2.7.6/boards/arm/mec1501modular_assy6885/
Dpinmux.c244 #if DT_NODE_HAS_STATUS(DT_INST(0, microchip_xec_i2c), okay) in board_pinmux_init()
245 i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(0, microchip_xec_i2c), port_sel)); in board_pinmux_init()
248 #if DT_NODE_HAS_STATUS(DT_INST(1, microchip_xec_i2c), okay) in board_pinmux_init()
249 i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(1, microchip_xec_i2c), port_sel)); in board_pinmux_init()
252 #if DT_NODE_HAS_STATUS(DT_INST(2, microchip_xec_i2c), okay) in board_pinmux_init()
253 i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(2, microchip_xec_i2c), port_sel)); in board_pinmux_init()
256 #if DT_NODE_HAS_STATUS(DT_INST(3, microchip_xec_i2c), okay) in board_pinmux_init()
257 i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(3, microchip_xec_i2c), port_sel)); in board_pinmux_init()
260 #if DT_NODE_HAS_STATUS(DT_INST(4, microchip_xec_i2c), okay) in board_pinmux_init()
261 i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(4, microchip_xec_i2c), port_sel)); in board_pinmux_init()
[all …]
/Zephyr-Core-2.7.6/boards/arc/iotdk/
Darc_mpu_regions.c15 DT_REG_ADDR(DT_INST(0, arc_iccm)),
16 DT_REG_SIZE(DT_INST(0, arc_iccm)),
20 DT_REG_ADDR(DT_INST(0, arc_dccm)),
21 DT_REG_SIZE(DT_INST(0, arc_dccm)),
/Zephyr-Core-2.7.6/tests/drivers/adc/adc_api/src/
Dtest_adc.c14 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, microchip_mcp3204))
25 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nordic_nrf_adc))
67 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nordic_nrf_saadc))
79 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
89 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
98 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
107 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
116 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
125 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
134 #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_kinetis_adc16))
[all …]
/Zephyr-Core-2.7.6/samples/drivers/spi_flash/src/
Dmain.c15 DT_NODE_HAS_STATUS(DT_INST(0, jedec_spi_nor), okay)
16 #define FLASH_DEVICE DT_LABEL(DT_INST(0, jedec_spi_nor))
19 DT_NODE_HAS_STATUS(DT_INST(0, nordic_qspi_nor), okay)
20 #define FLASH_DEVICE DT_LABEL(DT_INST(0, nordic_qspi_nor))
22 #elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_qspi_nor), okay)
23 #define FLASH_DEVICE DT_LABEL(DT_INST(0, st_stm32_qspi_nor))

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