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Searched refs:DT_DRV_INST (Results 1 – 25 of 98) sorted by relevance

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/Zephyr-Core-2.7.6/include/devicetree/
Dpinctrl.h312 DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), pc_idx, idx)
330 DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), 0, idx)
345 DT_PINCTRL_BY_NAME(DT_DRV_INST(inst), name, idx)
359 DT_PINCTRL_NAME_TO_IDX(DT_DRV_INST(inst), name)
372 DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_DRV_INST(inst), pc_idx)
385 DT_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(DT_DRV_INST(inst), pc_idx)
399 DT_NUM_PINCTRLS_BY_IDX(DT_DRV_INST(inst), pc_idx)
412 DT_NUM_PINCTRLS_BY_NAME(DT_DRV_INST(inst), name)
423 DT_NUM_PINCTRL_STATES(DT_DRV_INST(inst))
436 DT_PINCTRL_HAS_IDX(DT_DRV_INST(inst), pc_idx)
[all …]
Ddma.h69 DT_DMAS_LABEL_BY_IDX(DT_DRV_INST(inst), idx)
185 DT_DMAS_LABEL_BY_NAME(DT_DRV_INST(inst), name)
198 DT_DMAS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
210 DT_DMAS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
272 DT_PHA_BY_IDX(DT_DRV_INST(inst), dmas, idx, cell)
328 DT_DMAS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
346 DT_DMAS_HAS_IDX(DT_DRV_INST(inst), idx)
366 DT_DMAS_HAS_NAME(DT_DRV_INST(inst), name)
Dspi.h260 DT_SPI_DEV_HAS_CS_GPIOS(DT_DRV_INST(inst))
270 DT_SPI_DEV_CS_GPIOS_CTLR(DT_DRV_INST(inst))
280 DT_SPI_DEV_CS_GPIOS_LABEL(DT_DRV_INST(inst))
289 DT_SPI_DEV_CS_GPIOS_PIN(DT_DRV_INST(inst))
299 DT_SPI_DEV_CS_GPIOS_FLAGS(DT_DRV_INST(inst))
Dio-channels.h180 DT_IO_CHANNELS_LABEL_BY_IDX(DT_DRV_INST(inst), idx)
193 DT_IO_CHANNELS_LABEL_BY_NAME(DT_DRV_INST(inst), name)
213 DT_IO_CHANNELS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
225 DT_IO_CHANNELS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
334 DT_IO_CHANNELS_INPUT_BY_IDX(DT_DRV_INST(inst), idx)
346 DT_IO_CHANNELS_INPUT_BY_NAME(DT_DRV_INST(inst), name)
Dclocks.h260 DT_CLOCKS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
283 DT_CLOCKS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
295 DT_CLOCKS_LABEL_BY_IDX(DT_DRV_INST(inst), idx)
308 DT_CLOCKS_LABEL_BY_NAME(DT_DRV_INST(inst), name)
328 DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
340 DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
Dordinals.h71 #define DT_INST_DEP_ORD(inst) DT_DEP_ORD(DT_DRV_INST(inst))
83 #define DT_INST_REQUIRES_DEP_ORDS(inst) DT_REQUIRES_DEP_ORDS(DT_DRV_INST(inst))
95 #define DT_INST_SUPPORTS_DEP_ORDS(inst) DT_SUPPORTS_DEP_ORDS(DT_DRV_INST(inst))
Dpwms.h416 DT_PWMS_LABEL_BY_IDX(DT_DRV_INST(inst), idx)
429 DT_PWMS_LABEL_BY_NAME(DT_DRV_INST(inst), name)
450 DT_PWMS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
462 DT_PWMS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
482 DT_PWMS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
494 DT_PWMS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
Dgpio.h237 DT_GPIO_LABEL_BY_IDX(DT_DRV_INST(inst), gpio_pha, idx)
260 DT_GPIO_PIN_BY_IDX(DT_DRV_INST(inst), gpio_pha, idx)
284 DT_GPIO_FLAGS_BY_IDX(DT_DRV_INST(inst), gpio_pha, idx)
/Zephyr-Core-2.7.6/include/
Ddevicetree.h2073 #define DT_DRV_INST(inst) DT_INST(inst, DT_DRV_COMPAT) macro
2087 DT_FOREACH_CHILD(DT_DRV_INST(inst), fn)
2102 DT_FOREACH_CHILD_VARGS(DT_DRV_INST(inst), fn, __VA_ARGS__)
2110 #define DT_INST_PROP(inst, prop) DT_PROP(DT_DRV_INST(inst), prop)
2118 #define DT_INST_PROP_LEN(inst, prop) DT_PROP_LEN(DT_DRV_INST(inst), prop)
2130 DT_PROP_HAS_IDX(DT_DRV_INST(inst), prop, idx)
2140 DT_PROP_BY_IDX(DT_DRV_INST(inst), prop, idx)
2150 DT_PROP_OR(DT_DRV_INST(inst), prop, default_value)
2182 DT_PROP_BY_PHANDLE_IDX(DT_DRV_INST(inst), phs, idx, prop)
2193 DT_PHA_BY_IDX(DT_DRV_INST(inst), pha, idx, cell)
[all …]
/Zephyr-Core-2.7.6/soc/arm/atmel_sam/common/
Datmel_sam_dt.h57 ATMEL_SAM_DT_GPIO(DT_DRV_INST(inst), idx)
73 ATMEL_SAM_DT_PIO(DT_DRV_INST(inst), idx)
83 ATMEL_SAM_DT_NUM_PINS(DT_DRV_INST(inst))
95 ATMEL_SAM_DT_PINS(DT_DRV_INST(inst))
/Zephyr-Core-2.7.6/tests/kernel/device/src/
Dmmio.c28 DEVICE_MMIO_ROM_INIT(DT_DRV_INST(0)),
118 DEVICE_MMIO_NAMED_ROM_INIT(corge, DT_DRV_INST(1)),
119 DEVICE_MMIO_NAMED_ROM_INIT(grault, DT_DRV_INST(2))
199 DEVICE_MMIO_TOPLEVEL(foo3, DT_DRV_INST(3));
200 DEVICE_MMIO_TOPLEVEL_STATIC(foo4, DT_DRV_INST(4));
/Zephyr-Core-2.7.6/drivers/serial/
Duart_cmsdk_apb.c482 #if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
515 #if DT_NUM_IRQS(DT_DRV_INST(0)) == 1
547 #if DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay)
580 #if DT_NUM_IRQS(DT_DRV_INST(1)) == 1
612 #if DT_NODE_HAS_STATUS(DT_DRV_INST(2), okay)
645 #if DT_NUM_IRQS(DT_DRV_INST(2)) == 1
677 #if DT_NODE_HAS_STATUS(DT_DRV_INST(3), okay)
710 #if DT_NUM_IRQS(DT_DRV_INST(3)) == 1
742 #if DT_NODE_HAS_STATUS(DT_DRV_INST(4), okay)
775 #if DT_NUM_IRQS(DT_DRV_INST(4)) == 1
/Zephyr-Core-2.7.6/soc/arm/nuvoton_npcx/common/
Dsoc_dt.h37 NPCX_DT_PROP_ENUM_OR(DT_DRV_INST(inst), prop, default_value)
60 DT_PHA(DT_DRV_INST(inst), clocks, bus)), \
61 .ctrl = DT_PHA(DT_DRV_INST(inst), clocks, ctl), \
62 .bit = DT_PHA(DT_DRV_INST(inst), clocks, bit), \
74 .bus = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, bus), \
75 .ctrl = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, ctl), \
76 .bit = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, bit), \
/Zephyr-Core-2.7.6/drivers/sensor/vcnl4040/
Dvcnl4040.c357 .led_i = DT_ENUM_IDX(DT_DRV_INST(0), led_current),
358 .led_dc = DT_ENUM_IDX(DT_DRV_INST(0), led_duty_cycle),
359 .als_it = DT_ENUM_IDX(DT_DRV_INST(0), als_it),
360 .proxy_it = DT_ENUM_IDX(DT_DRV_INST(0), proximity_it),
361 .proxy_type = DT_ENUM_IDX(DT_DRV_INST(0), proximity_trigger),
/Zephyr-Core-2.7.6/drivers/counter/
Dcounter_mcux_pit.c146 if (chan_id != DT_PROP(DT_DRV_INST(0), pit_channel)) { in mcux_pit_set_alarm()
170 if (chan_id != DT_PROP(DT_DRV_INST(0), pit_channel)) { in mcux_pit_cancel_alarm()
196 USEC_TO_COUNT(DT_PROP(DT_DRV_INST(0), pit_period), in mcux_pit_init()
228 .freq = DT_PROP(DT_DRV_INST(0), clock_frequency),
231 .pit_channel = DT_PROP(DT_DRV_INST(0), pit_channel),
/Zephyr-Core-2.7.6/drivers/syscon/
Dsyscon.c137 DEVICE_MMIO_ROM_INIT(DT_DRV_INST(inst)), \
141 .size = DT_REG_SIZE(DT_DRV_INST(inst)), \
/Zephyr-Core-2.7.6/soc/arm/atmel_sam0/common/
Datmel_sam0_dt.h90 ATMEL_SAM0_DT_NUM_PINS(DT_DRV_INST(inst))
102 ATMEL_SAM0_DT_PINS(DT_DRV_INST(inst))
/Zephyr-Core-2.7.6/subsys/storage/flash_map/
Dflash_map_default.c19 #define FOREACH_PARTITION(n) DT_FOREACH_CHILD(DT_DRV_INST(n), FLASH_AREA_FOO)
/Zephyr-Core-2.7.6/drivers/spi/
Dspi_dw.c537 #if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
567 #if DT_NUM_IRQS(DT_DRV_INST(0)) == 1 in spi_config_0_irq()
600 #if DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay)
630 #if DT_NUM_IRQS(DT_DRV_INST(1)) == 1 in spi_config_1_irq()
663 #if DT_NODE_HAS_STATUS(DT_DRV_INST(2), okay)
693 #if DT_NUM_IRQS(DT_DRV_INST(2)) == 1 in spi_config_2_irq()
726 #if DT_NODE_HAS_STATUS(DT_DRV_INST(3), okay)
756 #if DT_NUM_IRQS(DT_DRV_INST(3)) == 1 in spi_config_3_irq()
Dspi_b91.c464 .peripheral_id = DT_ENUM_IDX(DT_DRV_INST(inst), peripheral_id), \
465 .cs_pin[0] = DT_STRING_TOKEN(DT_DRV_INST(inst), cs0_pin), \
466 .cs_pin[1] = DT_STRING_TOKEN(DT_DRV_INST(inst), cs1_pin), \
467 .cs_pin[2] = DT_STRING_TOKEN(DT_DRV_INST(inst), cs2_pin), \
/Zephyr-Core-2.7.6/drivers/ethernet/phy/
Dphy_mii.c393 #define IS_FIXED_LINK(n) DT_NODE_HAS_PROP(DT_DRV_INST(n), fixed_link)
405 .phy_addr = DT_PROP(DT_DRV_INST(n), address), \
407 .fixed_speed = DT_ENUM_IDX_OR(DT_DRV_INST(n), fixed_link, 0), \
409 DEVICE_DT_GET(DT_PHANDLE(DT_DRV_INST(n), mdio)))\
/Zephyr-Core-2.7.6/include/drivers/
Dspi.h215 SPI_CS_CONTROL_PTR_DT(DT_DRV_INST(inst), delay_)
297 SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
351 SPI_DT_SPEC_GET(DT_DRV_INST(inst), operation_, delay_)
/Zephyr-Core-2.7.6/drivers/mdio/
Dmdio_sam.c133 .regs = (Gmac *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(n))), \
134 .protocol = DT_ENUM_IDX(DT_DRV_INST(n), protocol), \
/Zephyr-Core-2.7.6/drivers/pwm/
Dpwm_stm32.c339 .bus = DT_CLOCKS_CELL(DT_PARENT(DT_DRV_INST(index)), bus), \
340 .enr = DT_CLOCKS_CELL(DT_PARENT(DT_DRV_INST(index)), bits) \
351 DT_PARENT(DT_DRV_INST(index))), \
/Zephyr-Core-2.7.6/drivers/gpio/
Dgpio_xlnx_axi.c252 DT_NODE_HAS_COMPAT(DT_CHILD(DT_DRV_INST(n), gpio2), \
254 DT_NODE_HAS_STATUS(DT_CHILD(DT_DRV_INST(n), gpio2), \
284 DEVICE_DT_DEFINE(DT_CHILD(DT_DRV_INST(n), gpio2), \

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