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Searched refs:addr_width (Results 1 – 7 of 7) sorted by relevance

/Zephyr-4.2.1/drivers/eeprom/
Deeprom_mb85rcxx.c24 uint8_t addr_width; member
49 if (cfg->addr_width > 8) { in mb85rcxx_translate_address()
51 addr[0] &= BIT_MASK(cfg->addr_width - 8); in mb85rcxx_translate_address()
53 addr[0] = page_offset & BIT_MASK(cfg->addr_width); in mb85rcxx_translate_address()
56 return cfg->i2c.addr + (offset >> cfg->addr_width); in mb85rcxx_translate_address()
120 ret = i2c_write_read(cfg->i2c.bus, i2c_addr, addr, DIV_ROUND_UP(cfg->addr_width, 8), in mb85rcxx_read()
144 msgs[0].len = DIV_ROUND_UP(cfg->addr_width, 8); in mb85rcxx_i2c_write()
226 .addr_width = DT_INST_PROP(inst, address_width), \
Deeprom_at2x.c55 uint8_t addr_width; member
241 const uint16_t addr_incr = *offset >> config->addr_width; in eeprom_at24_translate_offset()
242 *offset &= BIT_MASK(config->addr_width); in eeprom_at24_translate_offset()
251 const size_t remainder = BIT(config->addr_width) - offset; in eeprom_at24_adjust_read_count()
271 if (config->addr_width == 16) { in eeprom_at24_read()
287 addr, config->addr_width / 8, in eeprom_at24_read()
307 uint8_t block[config->addr_width / 8 + count]; in eeprom_at24_write()
320 if (config->addr_width == 16) { in eeprom_at24_write()
422 size_t cmd_len = 1 + config->addr_width / 8; in eeprom_at25_read()
459 switch (config->addr_width) { in eeprom_at25_read()
[all …]
Deeprom_at2x_emul.c38 uint8_t addr_width; member
162 .addr_width = 8, \
/Zephyr-4.2.1/tests/drivers/i2c/i2c_target_api/src/
Dmain.c67 uint8_t addr_width, const uint8_t *comp_buffer) in run_full_read() argument
77 ret = i2c_write_read(i2c, addr, start_addr, (addr_width >> 3), i2c_buffer, TEST_DATA_SIZE); in run_full_read()
96 uint8_t addr_width, const uint8_t *comp_buffer, unsigned int offset) in run_partial_read() argument
104 switch (addr_width) { in run_partial_read()
116 start_addr, (addr_width >> 3), i2c_buffer, TEST_DATA_SIZE-offset); in run_partial_read()
135 uint8_t addr_width, unsigned int offset) in run_program_read() argument
144 switch (addr_width) { in run_program_read()
/Zephyr-4.2.1/drivers/flash/
Dflash_mcux_flexspi_nor.c958 uint8_t addr_width; in flash_flexspi_nor_config_flash() local
983 addr_width = jesd216_bfp_addrbytes(bfp) == in flash_flexspi_nor_config_flash()
998 addr_width = 32; in flash_flexspi_nor_config_flash()
1003 kFLEXSPI_1PAD, addr_width); in flash_flexspi_nor_config_flash()
1007 kFLEXSPI_1PAD, addr_width); in flash_flexspi_nor_config_flash()
1035 kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_8PAD, addr_width); in flash_flexspi_nor_config_flash()
1062 kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, addr_width); in flash_flexspi_nor_config_flash()
1080 kFLEXSPI_1PAD, addr_width); in flash_flexspi_nor_config_flash()
1105 kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_2PAD, addr_width); in flash_flexspi_nor_config_flash()
1116 kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, addr_width); in flash_flexspi_nor_config_flash()
Dflash_max32_spixf_nor.c516 uint8_t addr_width, data_width; in flash_max32_spixf_nor_write() local
533 addr_width = (pp_cmd == SPI_NOR_CMD_PP_1_1_4 && !dev_cfg->force_quad_addr_writes) in flash_max32_spixf_nor_write()
538 addr_width = MXC_SPIXF_WIDTH_1; in flash_max32_spixf_nor_write()
576 req.req.width = addr_width; in flash_max32_spixf_nor_write()
/Zephyr-4.2.1/drivers/memc/
Dmemc_silabs_siwx91x_qspi.c101 .spi_config.spi_config_2.addr_width = 3, /* 24 bits */