1/* SPDX-License-Identifier: Apache-2.0 */ 2 3#include <arm/armv7-m.dtsi> 4#include <nordic/nrf_common.dtsi> 5#include <zephyr/dt-bindings/adc/nrf-saadc-v2.h> 6#include <zephyr/dt-bindings/regulator/nrf5x.h> 7 8/ { 9 chosen { 10 zephyr,bt-hci = &bt_hci_controller; 11 zephyr,entropy = &rng; 12 zephyr,flash-controller = &flash_controller; 13 }; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 device_type = "cpu"; 21 compatible = "arm,cortex-m4f"; 22 reg = <0>; 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 itm: itm@e0000000 { 27 compatible = "arm,armv7m-itm"; 28 reg = <0xe0000000 0x1000>; 29 swo-ref-frequency = <32000000>; 30 }; 31 }; 32 }; 33 34 soc { 35 ficr: ficr@10000000 { 36 compatible = "nordic,nrf-ficr"; 37 reg = <0x10000000 0x1000>; 38 #nordic,ficr-cells = <1>; 39 status = "okay"; 40 }; 41 42 uicr: uicr@10001000 { 43 compatible = "nordic,nrf-uicr"; 44 reg = <0x10001000 0x1000>; 45 status = "okay"; 46 }; 47 48 sram0: memory@20000000 { 49 compatible = "mmio-sram"; 50 }; 51 52 clock: clock@40000000 { 53 compatible = "nordic,nrf-clock"; 54 reg = <0x40000000 0x1000>; 55 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 56 status = "okay"; 57 }; 58 59 power: power@40000000 { 60 compatible = "nordic,nrf-power"; 61 reg = <0x40000000 0x1000>; 62 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 63 status = "okay"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 67 gpregret1: gpregret1@4000051c { 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "nordic,nrf-gpregret"; 71 reg = <0x4000051c 0x1>; 72 status = "okay"; 73 }; 74 75 gpregret2: gpregret2@40000520 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "nordic,nrf-gpregret"; 79 reg = <0x40000520 0x1>; 80 status = "okay"; 81 }; 82 83 reg: regulator@40000578 { 84 compatible = "nordic,nrf5x-regulator"; 85 reg = <0x40000578 0x1>; 86 regulator-name = "REG"; 87 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 88 }; 89 }; 90 91 bprot: bprot@40000000 { 92 compatible = "nordic,nrf-bprot"; 93 reg = <0x40000000 0x1000>; 94 status = "okay"; 95 }; 96 97 radio: radio@40001000 { 98 compatible = "nordic,nrf-radio"; 99 reg = <0x40001000 0x1000>; 100 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 101 status = "okay"; 102 ble-2mbps-supported; 103 104 /* Note: In the nRF Connect SDK the SoftDevice Controller 105 * is added and set as the default Bluetooth Controller. 106 */ 107 bt_hci_controller: bt_hci_controller { 108 compatible = "zephyr,bt-hci-ll-sw-split"; 109 status = "okay"; 110 }; 111 }; 112 113 uart0: uart@40002000 { 114 /* uart can be either UART or UARTE, for the user to pick */ 115 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 116 compatible = "nordic,nrf-uarte"; 117 reg = <0x40002000 0x1000>; 118 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 119 status = "disabled"; 120 }; 121 122 i2c0: i2c@40003000 { 123 /* 124 * This i2c node can be TWI, TWIM, or TWIS, 125 * for the user to pick: 126 * compatible = "nordic,nrf-twi" or 127 * "nordic,nrf-twim" or 128 * "nordic,nrf-twis". 129 */ 130 compatible = "nordic,nrf-twim"; 131 #address-cells = <1>; 132 #size-cells = <0>; 133 reg = <0x40003000 0x1000>; 134 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 135 easydma-maxcnt-bits = <8>; 136 status = "disabled"; 137 zephyr,pm-device-runtime-auto; 138 }; 139 140 spi0: spi@40003000 { 141 /* 142 * This spi node can be SPI, SPIM, or SPIS, 143 * for the user to pick: 144 * compatible = "nordic,nrf-spi" or 145 * "nordic,nrf-spim" or 146 * "nordic,nrf-spis". 147 */ 148 compatible = "nordic,nrf-spi"; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 reg = <0x40003000 0x1000>; 152 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 153 max-frequency = <DT_FREQ_M(8)>; 154 easydma-maxcnt-bits = <8>; 155 status = "disabled"; 156 }; 157 158 i2c1: i2c@40004000 { 159 /* 160 * This i2c node can be TWI, TWIM, or TWIS, 161 * for the user to pick: 162 * compatible = "nordic,nrf-twi" or 163 * "nordic,nrf-twim" or 164 * "nordic,nrf-twis". 165 */ 166 compatible = "nordic,nrf-twim"; 167 #address-cells = <1>; 168 #size-cells = <0>; 169 reg = <0x40004000 0x1000>; 170 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 171 easydma-maxcnt-bits = <8>; 172 status = "disabled"; 173 zephyr,pm-device-runtime-auto; 174 }; 175 176 spi1: spi@40004000 { 177 /* 178 * This spi node can be SPI, SPIM, or SPIS, 179 * for the user to pick: 180 * compatible = "nordic,nrf-spi" or 181 * "nordic,nrf-spim" or 182 * "nordic,nrf-spis". 183 */ 184 compatible = "nordic,nrf-spi"; 185 #address-cells = <1>; 186 #size-cells = <0>; 187 reg = <0x40004000 0x1000>; 188 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 189 max-frequency = <DT_FREQ_M(8)>; 190 easydma-maxcnt-bits = <8>; 191 status = "disabled"; 192 }; 193 194 nfct: nfct@40005000 { 195 compatible = "nordic,nrf-nfct"; 196 reg = <0x40005000 0x1000>; 197 interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; 198 status = "disabled"; 199 }; 200 201 gpiote: gpiote0: gpiote@40006000 { 202 compatible = "nordic,nrf-gpiote"; 203 reg = <0x40006000 0x1000>; 204 interrupts = <6 5>; 205 status = "disabled"; 206 instance = <0>; 207 }; 208 209 adc: adc@40007000 { 210 compatible = "nordic,nrf-saadc"; 211 reg = <0x40007000 0x1000>; 212 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 213 status = "disabled"; 214 #io-channel-cells = <1>; 215 zephyr,pm-device-runtime-auto; 216 }; 217 218 timer0: timer@40008000 { 219 compatible = "nordic,nrf-timer"; 220 status = "disabled"; 221 reg = <0x40008000 0x1000>; 222 cc-num = <4>; 223 max-bit-width = <32>; 224 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 225 prescaler = <0>; 226 }; 227 228 timer1: timer@40009000 { 229 compatible = "nordic,nrf-timer"; 230 status = "disabled"; 231 reg = <0x40009000 0x1000>; 232 cc-num = <4>; 233 max-bit-width = <32>; 234 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 235 prescaler = <0>; 236 }; 237 238 timer2: timer@4000a000 { 239 compatible = "nordic,nrf-timer"; 240 status = "disabled"; 241 reg = <0x4000a000 0x1000>; 242 cc-num = <4>; 243 max-bit-width = <32>; 244 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 245 prescaler = <0>; 246 }; 247 248 rtc0: rtc@4000b000 { 249 compatible = "nordic,nrf-rtc"; 250 reg = <0x4000b000 0x1000>; 251 cc-num = <3>; 252 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 253 status = "disabled"; 254 clock-frequency = <32768>; 255 prescaler = <1>; 256 }; 257 258 temp: temp@4000c000 { 259 compatible = "nordic,nrf-temp"; 260 reg = <0x4000c000 0x1000>; 261 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 262 status = "okay"; 263 }; 264 265 rng: random@4000d000 { 266 compatible = "nordic,nrf-rng"; 267 reg = <0x4000d000 0x1000>; 268 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 269 status = "okay"; 270 }; 271 272 ecb: ecb@4000e000 { 273 compatible = "nordic,nrf-ecb"; 274 reg = <0x4000e000 0x1000>; 275 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 276 status = "okay"; 277 }; 278 279 ccm: ccm@4000f000 { 280 compatible = "nordic,nrf-ccm"; 281 reg = <0x4000f000 0x1000>; 282 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 283 length-field-length-8-bits; 284 status = "okay"; 285 }; 286 287 wdt: wdt0: watchdog@40010000 { 288 compatible = "nordic,nrf-wdt"; 289 reg = <0x40010000 0x1000>; 290 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 291 status = "okay"; 292 }; 293 294 rtc1: rtc@40011000 { 295 compatible = "nordic,nrf-rtc"; 296 reg = <0x40011000 0x1000>; 297 cc-num = <4>; 298 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 299 status = "disabled"; 300 clock-frequency = <32768>; 301 prescaler = <1>; 302 }; 303 304 qdec: qdec0: qdec@40012000 { 305 compatible = "nordic,nrf-qdec"; 306 reg = <0x40012000 0x1000>; 307 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 308 status = "disabled"; 309 }; 310 311 comp: comparator@40013000 { 312 /* 313 * Use compatible "nordic,nrf-comp" to configure as COMP 314 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP 315 */ 316 compatible = "nordic,nrf-comp"; 317 reg = <0x40013000 0x1000>; 318 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 319 status = "disabled"; 320 }; 321 322 egu0: swi0: egu@40014000 { 323 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 324 reg = <0x40014000 0x1000>; 325 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 326 status = "okay"; 327 }; 328 329 egu1: swi1: egu@40015000 { 330 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 331 reg = <0x40015000 0x1000>; 332 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 333 status = "okay"; 334 }; 335 336 egu2: swi2: egu@40016000 { 337 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 338 reg = <0x40016000 0x1000>; 339 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 340 status = "okay"; 341 }; 342 343 egu3: swi3: egu@40017000 { 344 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 345 reg = <0x40017000 0x1000>; 346 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 347 status = "okay"; 348 }; 349 350 egu4: swi4: egu@40018000 { 351 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 352 reg = <0x40018000 0x1000>; 353 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 354 status = "okay"; 355 }; 356 357 egu5: swi5: egu@40019000 { 358 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 359 reg = <0x40019000 0x1000>; 360 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 361 status = "okay"; 362 }; 363 364 timer3: timer@4001a000 { 365 compatible = "nordic,nrf-timer"; 366 status = "disabled"; 367 reg = <0x4001a000 0x1000>; 368 cc-num = <6>; 369 max-bit-width = <32>; 370 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 371 prescaler = <0>; 372 }; 373 374 timer4: timer@4001b000 { 375 compatible = "nordic,nrf-timer"; 376 status = "disabled"; 377 reg = <0x4001b000 0x1000>; 378 cc-num = <6>; 379 max-bit-width = <32>; 380 interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; 381 prescaler = <0>; 382 }; 383 384 pwm0: pwm@4001c000 { 385 compatible = "nordic,nrf-pwm"; 386 reg = <0x4001c000 0x1000>; 387 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 388 status = "disabled"; 389 #pwm-cells = <3>; 390 }; 391 392 pdm0: pdm@4001d000 { 393 compatible = "nordic,nrf-pdm"; 394 reg = <0x4001d000 0x1000>; 395 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 396 status = "disabled"; 397 }; 398 399 flash_controller: flash-controller@4001e000 { 400 compatible = "nordic,nrf52-flash-controller"; 401 reg = <0x4001e000 0x1000>; 402 403 #address-cells = <1>; 404 #size-cells = <1>; 405 406 407 flash0: flash@0 { 408 compatible = "soc-nv-flash"; 409 erase-block-size = <4096>; 410 write-block-size = <4>; 411 }; 412 }; 413 414 ppi: ppi@4001f000 { 415 compatible = "nordic,nrf-ppi"; 416 reg = <0x4001f000 0x1000>; 417 status = "okay"; 418 }; 419 420 mwu: mwu@40020000 { 421 compatible = "nordic,nrf-mwu"; 422 reg = <0x40020000 0x1000>; 423 status = "okay"; 424 }; 425 426 pwm1: pwm@40021000 { 427 compatible = "nordic,nrf-pwm"; 428 reg = <0x40021000 0x1000>; 429 interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>; 430 status = "disabled"; 431 #pwm-cells = <3>; 432 }; 433 434 pwm2: pwm@40022000 { 435 compatible = "nordic,nrf-pwm"; 436 reg = <0x40022000 0x1000>; 437 interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>; 438 status = "disabled"; 439 #pwm-cells = <3>; 440 }; 441 442 spi2: spi@40023000 { 443 /* 444 * This spi node can be SPI, SPIM, or SPIS, 445 * for the user to pick: 446 * compatible = "nordic,nrf-spi" or 447 * "nordic,nrf-spim" or 448 * "nordic,nrf-spis". 449 */ 450 compatible = "nordic,nrf-spi"; 451 #address-cells = <1>; 452 #size-cells = <0>; 453 reg = <0x40023000 0x1000>; 454 interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>; 455 max-frequency = <DT_FREQ_M(8)>; 456 easydma-maxcnt-bits = <8>; 457 status = "disabled"; 458 }; 459 460 rtc2: rtc@40024000 { 461 compatible = "nordic,nrf-rtc"; 462 reg = <0x40024000 0x1000>; 463 cc-num = <4>; 464 interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>; 465 status = "disabled"; 466 clock-frequency = <32768>; 467 prescaler = <1>; 468 }; 469 470 i2s0: i2s@40025000 { 471 compatible = "nordic,nrf-i2s"; 472 #address-cells = <1>; 473 #size-cells = <0>; 474 reg = <0x40025000 0x1000>; 475 interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>; 476 status = "disabled"; 477 }; 478 479 gpio0: gpio@50000000 { 480 compatible = "nordic,nrf-gpio"; 481 gpio-controller; 482 reg = <0x50000000 0x1000>; 483 #gpio-cells = <2>; 484 status = "disabled"; 485 port = <0>; 486 gpiote-instance = <&gpiote>; 487 }; 488 }; 489}; 490 491&nvic { 492 arm,num-irq-priority-bits = <3>; 493}; 494 495&systick { 496 /* Use RTC for system clock, instead of SysTick. */ 497 status = "disabled"; 498}; 499
