1/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* Common dts file to enable supported features for CPU 0.
8 * This file is included by both the default variant
9 * which is run from internal flash and the QSPI variant.
10 */
11/dts-v1/;
12
13#include <nxp/nxp_mcxn94x.dtsi>
14#include "frdm_mcxn947.dtsi"
15
16/ {
17	cpus {
18		/delete-node/ cpu@1;
19	};
20
21	chosen {
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash;
24		zephyr,flash-controller = &fmu;
25		zephyr,code-partition = &slot0_partition;
26		zephyr,uart-mcumgr = &flexcomm4_lpuart4;
27		zephyr,console = &flexcomm4_lpuart4;
28		zephyr,shell-uart = &flexcomm4_lpuart4;
29		zephyr,canbus = &flexcan0;
30	};
31
32	aliases{
33		watchdog0 = &wwdt0;
34		pwm-0 = &flexpwm1_pwm0;
35		pwm-1 = &sc_timer;
36		rtc = &rtc;
37	};
38};
39
40/*
41 * Default for this board is to allocate SRAM0-5 to cpu0 but the
42 * application can have an application specific device tree to
43 * allocate the SRAM0-7 differently.
44 *
45 * For example, SRAM0-6 could be allocated to cpu0 with only SRAM7
46 * for cpu1. This would require the value of sram0 to have a DT_SIZE_K
47 * of 384. You would have to make updates to cpu1 sram settings as well.
48 */
49&sram0 {
50	compatible = "mmio-sram";
51	reg = <0x20000000 DT_SIZE_K(320)>;
52};
53
54&gpio4 {
55	status = "okay";
56};
57
58&gpio1 {
59	status = "okay";
60};
61
62&gpio0 {
63	status = "okay";
64};
65
66&gpio2 {
67	status = "okay";
68};
69
70&green_led {
71	status = "okay";
72};
73
74&red_led {
75	status = "okay";
76};
77
78&user_button_2 {
79	status = "okay";
80};
81
82&edma0 {
83	status = "okay";
84};
85
86&flexcomm1 {
87	status = "okay";
88};
89
90&flexcomm1_lpspi1 {
91	status = "okay";
92};
93
94&flexcomm2 {
95	status = "okay";
96};
97
98&flexcomm2_lpi2c2 {
99	status = "okay";
100};
101
102/*
103 *LPFLEXCOMM supports UART and I2C on the same instance, enable this for
104 * LFLEXCOMM2
105 */
106&flexcomm2_lpuart2 {
107	status = "okay";
108};
109
110&flexcomm4 {
111	status = "okay";
112};
113
114&flexcomm4_lpuart4 {
115	status = "okay";
116};
117
118&flexcomm7 {
119	status = "okay";
120};
121
122&flexcomm7_lpi2c7 {
123	status = "okay";
124};
125
126&flexspi {
127	status = "okay";
128};
129
130&w25q64jvssiq {
131	status = "okay";
132};
133
134&dac0 {
135	status = "okay";
136};
137
138&enet {
139	status = "okay";
140};
141
142&enet_mac {
143	status = "okay";
144};
145
146&enet_mdio {
147	status = "okay";
148};
149
150&wwdt0 {
151	status = "okay";
152};
153
154&flexpwm1_pwm0 {
155	status = "okay";
156};
157
158&flexcan0 {
159	status = "okay";
160};
161
162&ctimer0 {
163	status = "okay";
164};
165
166&usdhc0 {
167	status = "okay";
168	sdmmc {
169		compatible = "zephyr,sdmmc-disk";
170		disk-name = "SD";
171		status = "okay";
172	};
173};
174
175&vref {
176	status = "okay";
177};
178
179&lpadc0 {
180	status = "okay";
181};
182
183zephyr_udc0: &usb1 {
184	status = "okay";
185	phy_handle = <&usbphy1>;
186};
187
188&usbphy1 {
189	status = "okay";
190	tx-d-cal = <4>;
191	tx-cal-45-dp-ohms = <7>;
192	tx-cal-45-dm-ohms = <7>;
193};
194
195&lpcmp0 {
196	status = "okay";
197};
198
199&lptmr0 {
200	status = "okay";
201};
202
203&i3c1 {
204	status = "okay";
205};
206
207&flexio0 {
208	status = "okay";
209};
210
211&mrt0_channel0 {
212	status = "okay";
213};
214
215&rtc {
216	status = "okay";
217};
218
219&sc_timer {
220	status = "okay";
221};
222