Home
last modified time | relevance | path

Searched full:this (Results 1 – 25 of 4597) sorted by relevance

12345678910>>...184

/hal_espressif-2.7.6/components/wear_levelling/
DWL_Flash.cpp4 // you may not use this file except in compliance with the License.
34 #ifndef _MSC_VER // MSVS has different format for this define
45 free(this->temp_buff); in ~WL_Flash()
62 memcpy(&this->cfg, cfg, sizeof(wl_config_t)); in config()
63 if (this->cfg.temp_buff_size < this->cfg.wr_size) { in config()
64 this->cfg.temp_buff_size = this->cfg.wr_size; in config()
66 this->configured = false; in config()
70 this->flash_drv = flash_drv; in config()
74 if ((this->cfg.sector_size % this->cfg.temp_buff_size) != 0) { in config()
77 if (this->cfg.page_size < this->cfg.sector_size) { in config()
[all …]
DWL_Ext_Perf.cpp4 // you may not use this file except in compliance with the License.
28 this->sector_buffer = NULL; in WL_Ext_Perf()
33 free(this->sector_buffer); in ~WL_Ext_Perf()
40 this->fat_sector_size = config->fat_sector_size; in config()
41 this->flash_sector_size = cfg->sector_size; in config()
43 this->sector_buffer = (uint32_t *)malloc(cfg->sector_size); in config()
44 if (this->sector_buffer == NULL) { in config()
48 this->size_factor = this->flash_sector_size / this->fat_sector_size; in config()
49 if (this->size_factor < 1) { in config()
67 return this->fat_sector_size; in sector_size()
[all …]
DWL_Ext_Safe.cpp4 // you may not use this file except in compliance with the License.
62 this->state_addr = WL_Flash::chip_size() - 2 * WL_Flash::sector_size(); in config()
63 this->dump_addr = WL_Flash::chip_size() - 1 * WL_Flash::sector_size(); in config()
75 result = this->recover(); in init()
81 ESP_LOGV(TAG, "%s size = %i", __func__, WL_Flash::chip_size() - 2 * this->flash_sector_size); in chip_size()
82 return WL_Flash::chip_size() - 2 * this->flash_sector_size; in chip_size()
90 result = WL_Flash::read(this->state_addr, &state, sizeof(WL_Ext_Safe_State)); in recover()
97 result = this->read(this->dump_addr, this->sector_buffer, this->flash_sector_size); in recover()
104 for (int i = 0; i < this->size_factor; i++) { in recover()
106this->write(state.local_addr_base * this->flash_sector_size + i * this->fat_sector_size, &this->se… in recover()
[all …]
/hal_espressif-2.7.6/components/spi_flash/sim/
DSpiFlash.cpp4 // you may not use this file except in compliance with the License.
48 this->chip_size = chip_size; in init()
49 this->block_size = block_size; in init()
50 this->sector_size = sector_size; in init()
51 this->page_size = page_size; in init()
53 this->blocks = DIV_AND_CEIL(this->chip_size, this->block_size); in init()
54 this->sectors = DIV_AND_CEIL(this->chip_size, this->sector_size); in init()
55 this->pages = DIV_AND_CEIL(this->chip_size, this->page_size); in init()
57 this->erase_cycles = (uint32_t*) calloc(this->sectors, sizeof(uint32_t)); in init()
58 this->erase_states = (bool*) calloc(this->sectors, sizeof(bool)); in init()
[all …]
/hal_espressif-2.7.6/components/soc/esp32c3/include/soc/
Duart_struct.h4 // you may not use this file except in compliance with the License.
29 …uint32_t rxfifo_full: 1; /*This interrupt raw bit turns to high level when rece…
30 …uint32_t txfifo_empty: 1; /*This interrupt raw bit turns to high level when the …
31 …uint32_t parity_err: 1; /*This interrupt raw bit turns to high level when rece…
32 …uint32_t frm_err: 1; /*This interrupt raw bit turns to high level when rece…
33 …uint32_t rxfifo_ovf: 1; /*This interrupt raw bit turns to high level when rece…
34 …uint32_t dsr_chg: 1; /*This interrupt raw bit turns to high level when rece…
35 …uint32_t cts_chg: 1; /*This interrupt raw bit turns to high level when rece…
36 …uint32_t brk_det: 1; /*This interrupt raw bit turns to high level when rece…
37 …uint32_t rxfifo_tout: 1; /*This interrupt raw bit turns to high level when rece…
[all …]
Duart_reg.h4 // you may not use this file except in compliance with the License.
24 /*description: UART $n accesses FIFO via this register.*/
32 /*description: This interrupt raw bit turns to high level when input rxd edge
39 /*description: This interrupt raw bit turns to high level when receiver detects
46 /*description: This interrupt raw bit turns to high level when detects a clash
53 /*description: This interrupt raw bit turns to high level when receiver detects
60 /*description: This interrupt raw bit turns to high level when receiver detects
67 /*description: This interrupt raw bit turns to high level when transmitter has
74 /*description: This interrupt raw bit turns to high level when transmitter has
81 /*description: This interrupt raw bit turns to high level when transmitter completes
[all …]
Dgdma_struct.h4 // you may not use this file except in compliance with the License.
28 …ase that the peripheral is UHCI0 for Rx channel 0. For other peripherals this raw interrupt is re…
35 …uint32_t infifo_ovf: 1; /*This raw interrupt bit turns to high level when lev…
36 …uint32_t infifo_udf: 1; /*This raw interrupt bit turns to high level when lev…
37 …uint32_t outfifo_ovf: 1; /*This raw interrupt bit turns to high level when lev…
38 …uint32_t outfifo_udf: 1; /*This raw interrupt bit turns to high level when lev…
83 …uint32_t in_done: 1; /*Set this bit to clear the IN_DONE_CH_INT interrupt.…
84 …uint32_t in_suc_eof: 1; /*Set this bit to clear the IN_SUC_EOF_CH_INT interru…
85 …uint32_t in_err_eof: 1; /*Set this bit to clear the IN_ERR_EOF_CH_INT interru…
86 …uint32_t out_done: 1; /*Set this bit to clear the OUT_DONE_CH_INT interrupt…
[all …]
/hal_espressif-2.7.6/components/soc/esp32/include/soc/
Duart_struct.h4 // you may not use this file except in compliance with the License.
26 … uint8_t rw_byte; /*This register stores one byte data read by rx fifo.*/
33 …uint32_t rxfifo_full: 1; /*This interrupt raw bit turns to high level when receiver…
34 …uint32_t txfifo_empty: 1; /*This interrupt raw bit turns to high level when the amou…
35 …uint32_t parity_err: 1; /*This interrupt raw bit turns to high level when receiver…
36 …uint32_t frm_err: 1; /*This interrupt raw bit turns to high level when receiver…
37 …uint32_t rxfifo_ovf: 1; /*This interrupt raw bit turns to high level when receiver…
38 …uint32_t dsr_chg: 1; /*This interrupt raw bit turns to high level when receiver…
39 …uint32_t cts_chg: 1; /*This interrupt raw bit turns to high level when receiver…
40 …uint32_t brk_det: 1; /*This interrupt raw bit turns to high level when receiver…
[all …]
Dpcnt_struct.h4 // you may not use this file except in compliance with the License.
27 …uint32_t filter_thres: 10; /*This register is used to filter pulse whose width is smaller…
28 …uint32_t filter_en: 1; /*This is the enable bit for filtering input signals for unit0…
29 …uint32_t thr_zero_en: 1; /*This is the enable bit for comparing unit0's count with 0 va…
30 …uint32_t thr_h_lim_en: 1; /*This is the enable bit for comparing unit0's count with thr…
31 …uint32_t thr_l_lim_en: 1; /*This is the enable bit for comparing unit0's count with thr_…
32 …uint32_t thr_thres0_en: 1; /*This is the enable bit for comparing unit0's count with thr…
33 …uint32_t thr_thres1_en: 1; /*This is the enable bit for comparing unit0's count with th…
34 …uint32_t ch0_neg_mode: 2; /*This register is used to control the mode of channel0's inpu…
35 …uint32_t ch0_pos_mode: 2; /*This register is used to control the mode of channel0's inpu…
[all …]
Demac_dma_struct.h4 // you may not use this file except in compliance with the License.
26this bit is set the MAC DMA Controller resets the logic and all internal registers of the MAC. It…
27 …uint32_t dma_arb_sch : 1; /*This bit specifies the arbitration scheme between the transmit and …
28 …uint32_t desc_skip_len : 5; /*This bit specifies the number of Word to skip between two unchained…
32 …uint32_t fixed_burst : 1; /*This bit controls whether the AHB master interface performs fixed b…
33This field indicates the maximum number of beats to be transferred in one Rx DMA transaction. This
34 …uint32_t use_sep_pbl : 1; /*When set high this bit configures the Rx DMA to use the value conf…
35 …uint32_t pblx8_mode : 1; /*When set high this bit multiplies the programmed PBL value (Bits[2…
36 …uint32_t dmaaddralibea : 1; /*When this bit is set high and the FIXED_BURST bit is 1 the AHB int…
37 …uint32_t dmamixedburst : 1; /*When this bit is set high and the FIXED_BURST bit is low the AHB m…
[all …]
Duhci_struct.h4 // you may not use this file except in compliance with the License.
26 … uint32_t in_rst: 1; /*Set this bit to reset in link operations.*/
27 … uint32_t out_rst: 1; /*Set this bit to reset out link operations.*/
28 uint32_t ahbm_fifo_rst: 1; /*Set this bit to reset dma ahb fifo.*/
29 … uint32_t ahbm_rst: 1; /*Set this bit to reset dma ahb interface.*/
30 … uint32_t in_loop_test: 1; /*Set this bit to enable loop test for in links.*/
31 … uint32_t out_loop_test: 1; /*Set this bit to enable loop test for out links.*/
34 …_t out_eof_mode: 1; /*Set this bit to produce eof after DMA pops all data cl…
35 …uint32_t uart0_ce: 1; /*Set this bit to use UART to transmit or receive d…
36 …uint32_t uart1_ce: 1; /*Set this bit to use UART1 to transmit or receive …
[all …]
Demac_mac_struct.h4 // you may not use this file except in compliance with the License.
26 …1; /*When this bit is set the receiver state machine of the MAC is enabled for receivi…
27 … : 1; /*When this bit is set the transmit state machine of the MAC is enabled for tran…
29 …ore rescheduling a transmission attempt during retries after a collision. This bit is applicable o…
30this bit is set the MAC strips the Pad or FCS field on the incoming frames only if the value of t…
32this bit is set the MAC attempts only one transmission. When a collision occurs on the MII interf…
33this bit is set the MAC calculates the 16-bit one's complement of the one's complement sum of all…
34 … : 1; /*When this bit is set the MAC operates in the full-duplex mode where it can transmi…
35 …uint32_t loopback : 1; /*When this bit is set the MAC operates in the loopback mode MII. The…
36this bit is set the MAC disables the reception of frames when the TX_EN is asserted in the half-d…
[all …]
Drmt_struct.h4 // you may not use this file except in compliance with the License.
25 …m the FIFO may get lost. As RMT memory area accesses using the RMTMEM method do not have this issue
30 …uint32_t div_cnt: 8; /*This register is used to configure the frequency divide…
32 …uint32_t mem_size: 4; /*This register is used to configure the the amount of mem…
33 …uint32_t carrier_en: 1; /*This is the carrier modulation enable control bit for ch…
34 …uint32_t carrier_out_lv: 1; /*This bit is used to configure the way carrier wave is mo…
35 …uint32_t mem_pd: 1; /*This bit is used to reduce power consumed by memory. 1:m…
36 …uint32_t clk_en: 1; /*This bit is used to control clock.when software config…
42 … uint32_t tx_start: 1; /*Set this bit to start sending data for channel0-7.*/
43 … uint32_t rx_en: 1; /*Set this bit to enable receiving data for channel0-7.*/
[all …]
Di2c_struct.h4 // you may not use this file except in compliance with the License.
26 …uint32_t period:14; /*This register is used to configure the low level width of SCL c…
35 …uint32_t sample_scl_level: 1; /*Set this bit to sample data in SCL low level. clear this
37 …uint32_t ms_mode: 1; /*Set this bit to configure the module as i2c master clea…
38 … uint32_t trans_start: 1; /*Set this bit to start sending data in tx_fifo.*/
39 …uint32_t tx_lsb_first: 1; /*This bit is used to control the sending mode for data n…
40 …uint32_t rx_lsb_first: 1; /*This bit is used to control the storage mode for receive…
41 …uint32_t clk_en: 1; /*This is the clock gating control bit for reading or writ…
48 uint32_t ack_rec: 1; /*This register stores the value of ACK bit.*/
50 … /*when I2C takes more than time_out_reg clocks to receive a data then this register changes to…
[all …]
Dmcpwm_struct.h4 // you may not use this file except in compliance with the License.
189 …32_t out_invert: 1; /*when set invert the output of PWM0A and PWM0B for this submodule*/
190 …t32_t in_invert: 1; /*when set invert the input of PWM0A and PWM0B for this submodule*/
303 … uint32_t timer0_tez_int_ena: 1; /*A PWM timer 0 TEZ event will trigger this interrupt*/
304 … uint32_t timer1_tez_int_ena: 1; /*A PWM timer 1 TEZ event will trigger this interrupt*/
305 … uint32_t timer2_tez_int_ena: 1; /*A PWM timer 2 TEZ event will trigger this interrupt*/
306 … uint32_t timer0_tep_int_ena: 1; /*A PWM timer 0 TEP event will trigger this interrupt*/
307 … uint32_t timer1_tep_int_ena: 1; /*A PWM timer 1 TEP event will trigger this interrupt*/
308 … uint32_t timer2_tep_int_ena: 1; /*A PWM timer 2 TEP event will trigger this interrupt*/
315 …nt32_t cmpr0_tea_int_ena: 1; /*A PWM operator 0 TEA event will trigger this interrupt*/
[all …]
/hal_espressif-2.7.6/components/newlib/
DCOPYING.NEWLIB11 This copyrighted material is made available to anyone wishing to use,
13 of the BSD License. This program is distributed in the hope that
16 A PARTICULAR PURPOSE. A copy of this license is available at
31 this list of conditions and the following disclaimer.
33 this list of conditions and the following disclaimer in the documentation
36 may be used to endorse or promote products derived from this software
39 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
47 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
52 The author of this software is David M. Gay.
56 Permission to use, copy, modify, and distribute this software for any
[all …]
/hal_espressif-2.7.6/components/spi_flash/
DKconfig7 If this option is enabled, any time SPI flash is written then the data will be read
8 back and verified. This can catch hardware problems with SPI flash, or flash which
16 If this option is enabled, if SPI flash write verification fails then a log error line
17 will be written with the address, expected & actual values. This can be useful when
25 … If this option is enabled, any SPI flash write which tries to set zero bits in the flash to
32 Such software will log spurious warnings if this option is enabled.
38 This option enables the following APIs:
51 Enable this flag to use patched versions of SPI flash ROM driver functions.
52 This option should be enabled, if any one of the following is true: (1) need to write
61 Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF.
[all …]
/hal_espressif-2.7.6/components/wpa_supplicant/src/eap_peer/
Deap_config.h5 * This software may be distributed under the terms of the BSD license.
19 * This field is used to set the real user identity or NAI (for
32 * This field is used for unencrypted use with EAP types that support
39 * This field can also be used with EAP-SIM/AKA/AKA' to store the
52 * This field can include either the plaintext password (default
56 * only be used with authentication mechanism that use this hash as the
60 * In addition, this field is used to configure a pre-shared key for
75 * This file can have one or more trusted CA certificates. If ca_cert
77 * verified. This is insecure and a trusted CA certificate should
83 * this to blob://blob_name.
[all …]
/hal_espressif-2.7.6/components/bootloader/
DKconfig.projbuild16 This option sets compiler optimization level (gcc -O argument)
71This setting is only used if the SPI flash pins have been overridden by setting the eFuses
74 …When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
78 … If this config item is set to N (default), the correct WP pin will be automatically used for any
79 …Espressif chip or module with integrated flash. If a custom setting is needed, set this config ite…
89 The option "Use custom SPI Flash WP Pin" must be set or this value is ignored
91 … burning a customized set of SPI flash pins in eFuse and using QIO or QOUT mode for flash, set this
98 If this option is enabled, and VDDSDIO LDO is set to 1.8V (using eFuse
100 output 1.9V instead. This helps prevent flash chip from browning out
103 This option has no effect if VDDSDIO is set to 3.3V, or if the internal
[all …]
/hal_espressif-2.7.6/components/lwip/
DKconfig7 The default name this device will report to other devices on the network.
14 If this feature is enabled, standard API such as gethostbyname
22 If this feature is enabled, all traffic from layer2(WIFI Driver) will be
31 Please make sure you fully understand the impact of this feature before
38 If this feature is enabled, some functions relating to RX/TX in LWIP will be
43 If this feature is disabled, all lwip functions will be put into FLASH.
49 If this feature is enabled, IGMP and MLD6 timers will be activated only
52 This feature will reduce the power consumption for applications which do not
69 This option is deprecated. Use VFS_SUPPORT_SELECT instead, which is
70 the inverse of this option.
[all …]
/hal_espressif-2.7.6/components/soc/esp32s2/include/soc/
Dcp_dma_struct.h4 * you may not use this file except in compliance with the License.
29 * This is the interrupt raw bit. Triggered when the last data of frame is received or
34 * This is the interrupt raw bit. Triggered when the last data of one frame is
39 * This is the interrupt raw bit. Triggered when all data indicated by one outlink
44 * This is the interrupt raw bit. Triggered when the last data with EOF flag has been
49 * This is the interrupt raw bit. Triggered when detecting inlink descriptor error,
54 * This is the interrupt raw bit. Triggered when detecting outlink descriptor error,
59 * This is the interrupt raw bit. Triggered when receiving data is completed and no
64 * This is the interrupt raw bit. Triggered when data corresponding to all outlink
69 * This is the interrupt raw bit. Triggered when crc calculation is done.
[all …]
Di2s_struct.h4 // you may not use this file except in compliance with the License.
25 uint32_t tx_reset: 1; /*Set this bit to reset transmitter*/
26 uint32_t rx_reset: 1; /*Set this bit to reset receiver*/
27 uint32_t tx_fifo_reset: 1; /*Set this bit to reset txFIFO*/
28 uint32_t rx_fifo_reset: 1; /*Set this bit to reset rxFIFO*/
29 uint32_t tx_start: 1; /*Set this bit to start transmitting data*/
30 uint32_t rx_start: 1; /*Set this bit to start receiving data*/
31 … uint32_t tx_slave_mod: 1; /*Set this bit to enable slave transmitter mode*/
32 … uint32_t rx_slave_mod: 1; /*Set this bit to enable slave receiver mode*/
33 … uint32_t tx_right_first: 1; /*Set this bit to transmit right channel data first*/
[all …]
/hal_espressif-2.7.6/components/soc/esp32s3/include/soc/
Dgdma_struct.h4 // you may not use this file except in compliance with the License.
26 …uint32_t in_rst : 1; /*This bit is used to reset DMA channel 0 Rx FSM and Rx FIFO point…
27 …uint32_t out_rst : 1; /*This bit is used to reset DMA channel 0 Tx FSM and Tx FIFO point…
30 …uint32_t out_auto_wrback : 1; /*Set this bit to enable automatic outlink-writeback when all the …
32 …uint32_t outdscr_burst_en : 1; /*Set this bit to 1 to enable INCR burst transfer for Tx channel 0…
33 …uint32_t indscr_burst_en : 1; /*Set this bit to 1 to enable INCR burst transfer for Rx channel 0…
34 …uint32_t out_data_burst_en : 1; /*Set this bit to 1 to enable INCR burst transfer for Tx channel 0…
35 …uint32_t in_data_burst_en : 1; /*Set this bit to 1 to enable INCR burst transfer for Rx channel 0…
36 …uint32_t mem_trans_en : 1; /*Set this bit 1 to enable automatic transmitting data from memory…
43 …uint32_t infifo_full_thrs : 12; /*This register is used to generate the INFIFO_FULL_WM_INT inter…
[all …]
/hal_espressif-2.7.6/components/esp32/
DKconfig2 # TODO: this component simply shouldn't be included
3 # in the build at the CMake level, but this is currently
68 This enables support for an external SPI RAM chip, connected in parallel with the
113 … SPIRAM_OCCUPY_SPI_HOST. Application code should never touch HSPI/VSPI hardware in this case. The
133 … when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
135 vulnerable to this will not be emitted.
137This will also not use any bits of newlib that are located in ROM, opting for a version that is
150 libraries (libgcc, newlib, bt, wifi) is not affected by this selection.
154 … encryption and this will be automatically disabled if this workaround is selected.
155 … 'Insert nops' is the workaround that was used in older esp-idf versions. This workaround
[all …]
/hal_espressif-2.7.6/components/mbedtls/port/include/mbedtls/
Desp_config.h5 * This set of compile-time options may be used to enable
13 * not use this file except in compliance with the License.
24 * This file is part of mbed TLS (https://tls.mbed.org)
37 * This section sets system specific settings.
61 * the date should be correct). This is used to verify the validity period of
78 * This allows different allocators (self-implemented or provided) to be
92 * Enable this layer to allow use of alternative memory allocators.
108 * This section sets support for features that are or are not needed
179 * Uncomment this macro to let mbed TLS use your own implementation of a
194 * Uncomment this macro to store the AES tables in ROM.
[all …]

12345678910>>...184