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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/lll/
Dlll_tim_internal.h2 * Copyright (c) 2018-2019 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
7 /* Range Delay
8 * Refer to BT Spec v5.1 Vol.6, Part B, Section 4.2.3 Range Delay
9 * "4 / 1000" is an approximation of the propagation time in us of the
17 switch (phy) { in addr_us_get()
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/lll/
Dlll_tim_internal.h2 * Copyright (c) 2018-2019 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
7 /* Range Delay
8 * Refer to BT Spec v5.1 Vol.6, Part B, Section 4.2.3 Range Delay
9 * "4 / 1000" is an approximation of the propagation time in us of the
17 switch (phy) { in addr_us_get()
/Zephyr-latest/dts/bindings/mfd/
Dinfineon,tle9104.yaml4 # SPDX-License-Identifier: Apache-2.0
7 description: Infineon TLE9104 4-channel powertrain switch
11 include: spi-device.yaml
16 en-gpios:
17 type: phandle-array
20 resn-gpios:
21 type: phandle-array
24 in1-gpios:
25 type: phandle-array
28 in2-gpios:
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/Zephyr-latest/dts/bindings/regulator/
Dadi,adp5360-regulator.yaml2 # SPDX-License-Identifier: Apache-2.0
7 The PMIC has one buck converter and one buck-boost converter. Both need to be
16 compatible = "adi,adp5360-regulator";
27 compatible: "adi,adp5360-regulator"
31 child-binding:
33 - name: regulator.yaml
34 property-allowlist:
35 - regulator-always-on
36 - regulator-boot-on
37 - regulator-boot-off
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Dregulator-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
5 GPIO-controlled voltage of regulators
8 vccq_sd0: regulator-vccq-sd0 {
9 compatible = "regulator-gpio";
11 regulator-name = "SD0 VccQ";
12 regulator-min-microvolt = <1800000>;
13 regulator-max-microvolt = <3300000>;
15 enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
20 regulator-boot-on;
28 - name: base.yaml
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/Zephyr-latest/subsys/bluetooth/controller/
DKconfig.df4 # SPDX-License-Identifier: Apache-2.0
55 bool "Reception of CTE with 1us sampling slots"
60 during CTE reception with 1us sampling slots.
65 bool "Support for 1us antenna switch slots"
69 Enable support for 1us antenna switching slots. This antenna switching
158 int "Maximum length of antenna switch pattern"
163 Defines maximum length of antenna switch pattern that controller
164 is able to store. For nRF5x-based controllers, the hardware imposes
202 int "Antenna switch offset relative to end of CRC"
204 range -2048 2047
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/Zephyr-latest/soc/nuvoton/npcx/common/
Dpower.c4 * SPDX-License-Identifier: Apache-2.0
17 * +--------------------------------------------------------------------------+
19 * |--------------------------------------------------------------------------|
24 * | Stand-By | Off | Off | Off | Off | Off | Off | On |
25 * +--------------------------------------------------------------------------+
27 * LFCLK - Low-Frequency Clock. Its frequency is fixed to 32kHz.
28 * HFCLK - High-Frequency (PLL) Clock. Its frequency is configured to OFMCLK.
32 * - A delay of 'Instant' wake-up from 'Deep Sleep' is 20 us.
33 * - A delay of 'Standard' wake-up from 'Deep Sleep' is 3.43 ms.
34 * - Max residency time in Deep Sleep for 'Instant' wake-up is 200 ms
[all …]
/Zephyr-latest/drivers/bluetooth/hci/
Dspi.c1 /* spi.c - SPI based Bluetooth driver */
8 * SPDX-License-Identifier: Apache-2.0
54 #define SPI_MAX_MSG_LEN 255 /* As defined by X-NUCLEO-IDB04A1 BSP */
62 #define MAX_MTU (SPI_MAX_MSG_LEN - H4_HDR_SIZE - BT_L2CAP_HDR_SIZE - BT_HCI_ACL_HDR_SIZE)
135 switch (bt_spi_get_evt(msg)) { in bt_spi_handle_vendor_evt()
156 return -EINVAL; in bt_spi_get_header()
190 switch (msg[PACKET_TYPE]) { in bt_spi_rx_buf_construct()
192 switch (msg[EVT_HEADER_EVENT]) { in bt_spi_rx_buf_construct()
244 struct bt_spi_data *hci = dev->data; in bt_spi_rx_thread()
265 /* Delay here is rounded up to next tick */ in bt_spi_rx_thread()
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Dhci_spi_st.c1 /* hci_spi_st.c - STMicroelectronics HCI SPI Bluetooth driver */
7 * SPDX-License-Identifier: Apache-2.0
65 #define MAX_MTU (SPI_MAX_MSG_LEN - H4_HDR_SIZE - BT_L2CAP_HDR_SIZE - BT_HCI_ACL_HDR_SIZE)
126 return -ENOTSUP; in bluenrg_bt_reset()
135 /* Add reset delay and release reset */ in bluenrg_bt_reset()
187 switch (bt_spi_get_evt(msg)) { in bt_spi_handle_vendor_evt()
210 /* On BlueNRG-MS, host is expected to read */
236 return -EINVAL; in bt_spi_get_header()
257 attempts--; in bt_spi_get_header()
297 /* To make sure we have a minimum delay from previous release cs */ in bt_spi_get_header()
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/Zephyr-latest/boards/nxp/vmu_rt1170/
Dvmu_rt1170_mimxrt1176_cm7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/led/led.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
24 pwm-led0 = &buzzer0;
25 mcuboot-button0 = &arming_button;
34 zephyr,shell-uart = &lpuart1;
36 zephyr,flash-controller = &mx25um51345g;
38 zephyr,code-partition = &slot0_partition;
39 zephyr,uart-mcumgr = &lpuart1;
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio_nrf5_ppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
10 * SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
16 /* Wire the SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event
40 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
47 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
66 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
67 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
70 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
75 (uint32_t)&(NRF_PPI->TASKS_CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX].DIS)); in hal_radio_enable_on_tick_ppi_config_and_enable()
[all …]
Dradio_nrf5_dppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
193 * PPI channel HAL_TRIGGER_CRYPT_DELAY_PPI is also used for HAL_TRIGGER-
197 * EEP: RADIO->EVENTS_BCMATCH
198 * TEP: CCM->TASKS_CRYPT
202 /* Configure Bit counter to trigger EVENTS_BCMATCH for CCM_TASKS_CRYPT- in hal_trigger_crypt_by_bcmatch_ppi_config()
227 /* DPPI setup used for SW-based auto-switching during TIFS. */
229 /* Clear SW-switch timer on packet end:
245 * The channel must be always enabled when software switch is used. in hal_sw_switch_timer_clear_ppi_config()
250 /* The 2 adjacent PPI groups used for implementing SW_SWITCH_TIMER-based
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Dradio.c2 * Copyright (c) 2016 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/gpio/gpio.h>
84 /* These headers require the above gpiote-related variables to be declared. */
131 NRF_DT_CHECK_GPIO_CTLR_IS_SOC(FEM_NODE, pdn_gpios, "pdn-gpios");
171 NRF_GPIO_PA->DIRSET = BIT(NRF_GPIO_PA_PIN); in radio_setup()
173 NRF_GPIO_PA->OUTSET = BIT(NRF_GPIO_PA_PIN); in radio_setup()
175 NRF_GPIO_PA->OUTCLR = BIT(NRF_GPIO_PA_PIN); in radio_setup()
180 NRF_GPIO_LNA->DIRSET = BIT(NRF_GPIO_LNA_PIN); in radio_setup()
186 NRF_GPIO_PDN->DIRSET = BIT(NRF_GPIO_PDN_PIN); in radio_setup()
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/Zephyr-latest/drivers/display/
Ddisplay_hx8394.c4 * SPDX-License-Identifier: Apache-2.0
149 0x73, /* SPON delay */
150 0x74, /* SPOFF delay */
151 0x73, /* CON delay */
152 0x74, /* COFF delay */
153 0x73, /* CON1 delay */
154 0x74, /* COFF1 delay */
161 0x73, /* SPON_MPU delay */
162 0x74, /* SPOFF_MPU delay */
163 0x73, /* CON_MPU delay */
[all …]
/Zephyr-latest/drivers/lora/
Dsx126x.c5 * SPDX-License-Identifier: Apache-2.0
196 LOG_DBG("-> status: 0x%" PRIx8, rx_req[1]); in SX126xReadCommand()
239 LOG_DBG("Enabling antenna switch"); in SX126xAntSwOn()
242 LOG_DBG("No antenna switch configured"); in SX126xAntSwOn()
249 LOG_DBG("Disabling antenna switch"); in SX126xAntSwOff()
252 LOG_DBG("No antenna switch configured"); in SX126xAntSwOff()
281 /* To avoid inadvertently putting the RF switch in an in SX126xSetOperatingMode()
285 switch (mode) { in SX126xSetOperatingMode()
334 /* Delay in units of 15.625 us (1/64 ms) */ in SX126xIoTcxoInit()
425 /* Re-enable the interrupt if we are not in sleep mode */ in sx126x_dio1_irq_work_handler()
[all …]
/Zephyr-latest/drivers/clock_control/
Dclock_control_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
30 * 32KHz period counter minimum for pass/fail: 16-bit
31 * 32KHz period counter maximum for pass/fail: 16-bit
32 * 32KHz duty cycle variation max for pass/fail: 16-bit
33 * 32KHz valid count minimum: 8-bit
35 * 32768 Hz period is 30.518 us
99 uint32_t RSVD4[(0x00c0 - 0x0094) / 4];
192 uint8_t core_clk_div; /* Cortex-M4 clock divider (CPU and NVIC) */
208 pcr->SYS_SLP_CTRL = 0U; in pcr_slp_init()
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/Zephyr-latest/drivers/ethernet/
Deth_smsc91x.c3 * SPDX-License-Identifier: Apache-2.0
18 #define SMSC_LOCK(sc) k_mutex_lock(&(sc)->lock, K_FOREVER)
19 #define SMSC_UNLOCK(sc) k_mutex_unlock(&(sc)->lock)
84 static ALWAYS_INLINE void delay(int us) in delay() function
86 k_busy_wait(us); in delay()
91 sys_write16(bank & BSR_BANK_MASK, sc->smsc_reg + BSR); in smsc_select_bank()
96 return FIELD_GET(BSR_BANK_MASK, sys_read16(sc->smsc_reg + BSR)); in smsc_current_bank()
102 while (sys_read16(sc->smsc_reg + MMUCR) & MMUCR_BUSY) { in smsc_mmu_wait()
109 return sys_read8(sc->smsc_reg + offset); in smsc_read_1()
114 return sys_read16(sc->smsc_reg + offset); in smsc_read_2()
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/Zephyr-latest/drivers/i2c/
Di2c_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
47 /* I2C recovery bit bang delay */
49 /* I2C recovery SCL sample delay */
112 * i2c_baud_clk_period/bus_clk_period - 2 = (low_period + hi_period)
113 * bus_clk_reg (16MHz/100KHz -2) = 0x4F + 0x4F
114 * (16MHz/400KHz -2) = 0x0F + 0x17
115 * (16MHz/1MHz -2) = 0x05 + 0x09
144 (const struct i2c_xec_config *const) (dev->config); in i2c_ctl_wr()
146 (struct i2c_xec_data *const) (dev->data); in i2c_ctl_wr()
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/Zephyr-latest/subsys/usb/device/class/dfu/
Dusb_dfu.c458 * Reboot with a delay, in reboot_schedule()
472 switch (setup->bRequest) { in dfu_class_handle_to_host()
507 setup->wValue, setup->wLength, dfu_data.state); in dfu_class_handle_to_host()
513 return -ENOTSUP; in dfu_class_handle_to_host()
517 return -EINVAL; in dfu_class_handle_to_host()
520 switch (dfu_data.state) { in dfu_class_handle_to_host()
526 if (!setup->wLength || in dfu_class_handle_to_host()
527 dfu_data.block_nr != setup->wValue) { in dfu_class_handle_to_host()
529 "len %d", setup->wValue, in dfu_class_handle_to_host()
530 dfu_data.block_nr, setup->wLength); in dfu_class_handle_to_host()
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/Zephyr-latest/doc/kernel/services/smp/
Dsmp.rst26 non-Zephyr code).
54 on top of the pre-existing :c:struct:`atomic_` layer (itself usually
65 re-acquire it or it will deadlock (it is perfectly legal to nest
71 recursive semantics above, spinlocks in single-CPU contexts produce
82 the ability to be atomically reacquired on context switch into locked
84 can hold the lock at any time, that it is released on context switch,
85 and that it is re-acquired when necessary to restore the lock state
109 :c:func:`k_thread_cpu_mask_enable` will re-enable execution. There are also
113 suspended, otherwise an ``-EINVAL`` will be returned.
116 involved in doing the per-CPU mask test requires that the list be
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/Zephyr-latest/drivers/sdhc/
Dimx_usdhc.c4 * SPDX-License-Identifier: Apache-2.0
101 struct usdhc_data *data = dev->data; in transfer_complete_cb()
104 data->transfer_status |= TRANSFER_DATA_FAILED; in transfer_complete_cb()
106 data->transfer_status |= TRANSFER_DATA_COMPLETE; in transfer_complete_cb()
108 data->transfer_status |= TRANSFER_CMD_FAILED; in transfer_complete_cb()
110 data->transfer_status |= TRANSFER_CMD_COMPLETE; in transfer_complete_cb()
112 k_sem_give(&data->transfer_sem); in transfer_complete_cb()
119 struct usdhc_data *data = dev->data; in sdio_interrupt_cb()
121 if (data->sdhc_cb) { in sdio_interrupt_cb()
122 data->sdhc_cb(dev, SDHC_INT_SDIO, data->sdhc_cb_user_data); in sdio_interrupt_cb()
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/Zephyr-latest/tests/kernel/smp/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
32 volatile int sync_count = -1;
55 static volatile int thread_started[MAX_NUM_THREADS - 1];
63 int ret = arch_curr_cpu()->id; in curr_cpu()
140 t2_count = -1; in ZTEST()
141 while (t2_count == -1) { in ZTEST()
193 while (sync_count == -1) { in ZTEST()
220 for (int i = 0; i < num_threads - 1; i++) { in spin_for_threads_exit()
221 volatile uint8_t *p = &tinfo[i].tid->base.thread_state; in spin_for_threads_exit()
230 k_thread_entry_t thread_entry, int delay) in spawn_threads() argument
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/Zephyr-latest/subsys/net/lib/dhcpv4/
Ddhcpv4.c10 * SPDX-License-Identifier: Apache-2.0
103 if (types[j] == cb->option) { in dhcpv4_option_callback_get_unique_types()
113 cb->option); in dhcpv4_option_callback_get_unique_types()
116 types[count] = cb->option; in dhcpv4_option_callback_get_unique_types()
122 unique_types_in_callbacks = count - ARRAY_SIZE(min_req_options); in dhcpv4_option_callback_get_unique_types()
175 4, addr->s4_addr); in dhcpv4_add_server_id()
182 4, addr->s4_addr); in dhcpv4_add_req_ipaddr()
251 const size_t vendor_class_id_size = sizeof(vendor_class_id) - 1; in dhcpv4_create_message()
305 msg->op = DHCPV4_MSG_BOOT_REQUEST; in dhcpv4_create_message()
306 msg->htype = HARDWARE_ETHERNET_TYPE; in dhcpv4_create_message()
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/Zephyr-latest/include/zephyr/
Dkernel.h4 * SPDX-License-Identifier: Apache-2.0
53 #define K_PRIO_COOP(x) (-(CONFIG_NUM_COOP_PRIORITIES - (x)))
56 #define K_HIGHEST_THREAD_PRIO (-CONFIG_NUM_COOP_PRIORITIES)
60 #define K_LOWEST_APPLICATION_THREAD_PRIO (K_LOWEST_THREAD_PRIO - 1)
245 * bits, arch-specific use high bits.
255 * @brief FPU registers are managed by context switch
289 * from within a user-provided callback they have been invoked.
290 * Effectively it serves as a tiny bit of zero-overhead TLS data.
295 * @brief DSP registers are managed by context switch
307 * @brief AGU registers are managed by context switch
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/Zephyr-latest/boards/st/sensortile_box_pro/
Dsensortile_box_pro.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/u5/stm32u585aiixq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "STMicroelectronics SENSORTILE-BOX-PRO board";
14 compatible = "st,sensortile-box-pro";
19 zephyr,code-partition = &slot0_partition;
20 zephyr,bt-hci = &hci_spi;
24 compatible = "gpio-leds";
44 compatible = "gpio-keys";
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