/hal_nxp-latest/mcux/middleware/wifi_nxp/incl/port/mbedtls/ |
D | wpa_supp_els_pkc_mbedtls_config.h | 53 * \name SECTION: System support 62 * The compiler has support for asm(). 64 * Requires support for asm() in compiler. 82 * The platform lacks support for double-width integer division (64-bit 100 * platform, but it need not support multiplication or division. In some 110 * The platform lacks support for 32x32 -> 64-bit multiplication. 149 * Comment if your system does not support time functions 204 * This makes sure there are no linking errors on platforms that do not support 220 * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the 342 /* \} name SECTION: System support */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/ |
D | MIMX8ML8_cm7_features.h | 16 ** mail: support@nxp.com 162 /* @brief If dma channel IRQ support parameter */ 175 /* @brief Support Interrupt Coalesce */ 179 /* @brief Has AVB Support. */ 183 /* @brief Has Extend MDIO Support. */ 187 /* @brief Support Interrupt Coalesce for each instance */ 191 /* @brief Has AVB Support for each instance. */ 195 /* @brief Has Extend MDIO Support for each instance. */ 212 /* @brief ENET QOS Queue Tx checksum offload support bit map. */ 220 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/ |
D | MIMX8ML6_cm7_features.h | 16 ** mail: support@nxp.com 162 /* @brief If dma channel IRQ support parameter */ 175 /* @brief Support Interrupt Coalesce */ 179 /* @brief Has AVB Support. */ 183 /* @brief Has Extend MDIO Support. */ 187 /* @brief Support Interrupt Coalesce for each instance */ 191 /* @brief Has AVB Support for each instance. */ 195 /* @brief Has Extend MDIO Support for each instance. */ 212 /* @brief ENET QOS Queue Tx checksum offload support bit map. */ 220 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/ |
D | MIMX8ML3_cm7_features.h | 16 ** mail: support@nxp.com 162 /* @brief If dma channel IRQ support parameter */ 175 /* @brief Support Interrupt Coalesce */ 179 /* @brief Has AVB Support. */ 183 /* @brief Has Extend MDIO Support. */ 187 /* @brief Support Interrupt Coalesce for each instance */ 191 /* @brief Has AVB Support for each instance. */ 195 /* @brief Has Extend MDIO Support for each instance. */ 212 /* @brief ENET QOS Queue Tx checksum offload support bit map. */ 220 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/ |
D | MIMX8ML4_cm7_features.h | 16 ** mail: support@nxp.com 162 /* @brief If dma channel IRQ support parameter */ 175 /* @brief Support Interrupt Coalesce */ 179 /* @brief Has AVB Support. */ 183 /* @brief Has Extend MDIO Support. */ 187 /* @brief Support Interrupt Coalesce for each instance */ 191 /* @brief Has AVB Support for each instance. */ 195 /* @brief Has Extend MDIO Support for each instance. */ 212 /* @brief ENET QOS Queue Tx checksum offload support bit map. */ 220 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/ |
D | fsl_pm_device.h | 114 …constraints definition of CPU platform (suitable for CM7 and CM4 processors), with support for four 130 * @brief Resource constraints definition of OSC_RC_16M, with support for 2 modes: 138 * @brief Resource constraints definition of OSC_RC_48M, with support for 2 modes: 146 * @brief Resource constraints definition of OSC_RC_48M_DIV2, with support for 2 modes: 154 * @brief Resource constraints definition of OSC_RC_400M, with support for 2 modes: 162 * @brief Resource constraints definition of OSC_RC_24M, with support for 2 modes: 170 * @brief Resource constraints definition of OSC_RC_24M_CLK, with support for 2 modes: 178 * @brief Resource constraints definition of ARM_PLL, with support for 2 modes: 186 * @brief Resource constraints definition of ARM_PLL_CLK, with support for 2 modes: 194 * @brief Resource constraints definition of SYS_PLL2, with support for 2 modes: [all …]
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/ |
D | fsl_pm_device.h | 114 …constraints definition of CPU platform (suitable for CM7 and CM4 processors), with support for four 130 * @brief Resource constraints definition of OSC_RC_16M, with support for 2 modes: 138 * @brief Resource constraints definition of OSC_RC_48M, with support for 2 modes: 146 * @brief Resource constraints definition of OSC_RC_48M_DIV2, with support for 2 modes: 154 * @brief Resource constraints definition of OSC_RC_400M, with support for 2 modes: 162 * @brief Resource constraints definition of OSC_RC_24M, with support for 2 modes: 170 * @brief Resource constraints definition of OSC_RC_24M_CLK, with support for 2 modes: 178 * @brief Resource constraints definition of ARM_PLL, with support for 2 modes: 186 * @brief Resource constraints definition of ARM_PLL_CLK, with support for 2 modes: 194 * @brief Resource constraints definition of SYS_PLL2, with support for 2 modes: [all …]
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/ |
D | fsl_pm_device.h | 114 …constraints definition of CPU platform (suitable for CM7 and CM4 processors), with support for four 130 * @brief Resource constraints definition of OSC_RC_16M, with support for 2 modes: 138 * @brief Resource constraints definition of OSC_RC_48M, with support for 2 modes: 146 * @brief Resource constraints definition of OSC_RC_48M_DIV2, with support for 2 modes: 154 * @brief Resource constraints definition of OSC_RC_400M, with support for 2 modes: 162 * @brief Resource constraints definition of OSC_RC_24M, with support for 2 modes: 170 * @brief Resource constraints definition of OSC_RC_24M_CLK, with support for 2 modes: 178 * @brief Resource constraints definition of ARM_PLL, with support for 2 modes: 186 * @brief Resource constraints definition of ARM_PLL_CLK, with support for 2 modes: 194 * @brief Resource constraints definition of SYS_PLL2, with support for 2 modes: [all …]
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/ |
D | fsl_pm_device.h | 114 …constraints definition of CPU platform (suitable for CM7 and CM4 processors), with support for four 130 * @brief Resource constraints definition of OSC_RC_16M, with support for 2 modes: 138 * @brief Resource constraints definition of OSC_RC_48M, with support for 2 modes: 146 * @brief Resource constraints definition of OSC_RC_48M_DIV2, with support for 2 modes: 154 * @brief Resource constraints definition of OSC_RC_400M, with support for 2 modes: 162 * @brief Resource constraints definition of OSC_RC_24M, with support for 2 modes: 170 * @brief Resource constraints definition of OSC_RC_24M_CLK, with support for 2 modes: 178 * @brief Resource constraints definition of ARM_PLL, with support for 2 modes: 186 * @brief Resource constraints definition of ARM_PLL_CLK, with support for 2 modes: 194 * @brief Resource constraints definition of SYS_PLL2, with support for 2 modes: [all …]
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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/ |
D | fsl_pm_device.h | 114 …constraints definition of CPU platform (suitable for CM7 and CM4 processors), with support for four 130 * @brief Resource constraints definition of OSC_RC_16M, with support for 2 modes: 138 * @brief Resource constraints definition of OSC_RC_48M, with support for 2 modes: 146 * @brief Resource constraints definition of OSC_RC_48M_DIV2, with support for 2 modes: 154 * @brief Resource constraints definition of OSC_RC_400M, with support for 2 modes: 162 * @brief Resource constraints definition of OSC_RC_24M, with support for 2 modes: 170 * @brief Resource constraints definition of OSC_RC_24M_CLK, with support for 2 modes: 178 * @brief Resource constraints definition of ARM_PLL, with support for 2 modes: 186 * @brief Resource constraints definition of ARM_PLL_CLK, with support for 2 modes: 194 * @brief Resource constraints definition of SYS_PLL2, with support for 2 modes: [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/ |
D | RW610_features.h | 14 ** mail: support@nxp.com 212 /* @brief DMIC channel support stereo data */ 214 /* @brief DMIC does not support bypass channel clock */ 216 /* @brief DMIC channel FIFO register support sign extended */ 227 /* @brief Support Interrupt Coalesce */ 231 /* @brief Has AVB Support. */ 235 /* @brief Has Extend MDIO Support. */ 239 /* @brief Support Interrupt Coalesce for each instance */ 243 /* @brief Has AVB Support for each instance. */ 247 /* @brief Has Extend MDIO Support for each instance. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/ |
D | RW612_features.h | 14 ** mail: support@nxp.com 212 /* @brief DMIC channel support stereo data */ 214 /* @brief DMIC does not support bypass channel clock */ 216 /* @brief DMIC channel FIFO register support sign extended */ 227 /* @brief Support Interrupt Coalesce */ 231 /* @brief Has AVB Support. */ 235 /* @brief Has Extend MDIO Support. */ 239 /* @brief Support Interrupt Coalesce for each instance */ 243 /* @brief Has AVB Support for each instance. */ 247 /* @brief Has Extend MDIO Support for each instance. */ [all …]
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/hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-multicore/ |
D | ChangeLogKSDK.txt | 37 - eRPC,erpcgen: Winsock2 support, GitHub PR #365. 38 - eRPC,erpcgen: Feature/support multiple clients, GitHub PR #271. 40 - eRPC,erpcgen: Add experimental Java support. 66 - erpcgen: Mingw support, GitHub PR #344. 76 - RPMsg-Lite: Added aarch64 support. 170 - RPMsg-Lite: Add support for custom shared memory arangement per the RPMsg_Lite instance. 185 …- eRPC, erpcgen: Static allocation support and usage of rpmsg static FreeRTOSs related APi, GitHub… 213 - eRPC: Support win32 thread, GitHub PR #108. 214 - eRPC: Add mbed support for malloc() and free(), GitHub PR #92. 249 - eRPC: Support MU transport unit testing. [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/ |
D | MIMXRT1176_cm4_features.h | 14 ** mail: support@nxp.com 182 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 184 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 210 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 224 /* @brief Has Pretended Networking mode support. */ 226 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 352 /* @brief Support Interrupt Coalesce */ 356 /* @brief Has AVB Support. */ 360 /* @brief Has Extend MDIO Support. */ 364 /* @brief Support Interrupt Coalesce for each instance */ [all …]
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/hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/ |
D | ChangeLogKSDK.txt | 11 - eUSB support on EHCI. 26 - Update EHCI controller driver for basic support of eUSB. 46 - Update the EHCI controller driver to support the address convert for TCM. 52 …- Update the EHCI controller driver to support RW610 that does not reply on PHY driver, especially… 61 - Support UAC 3.1, 5.1 and 7.1 on audio speaker demo. 63 - Support MCUX toolchain on some RTxxxx platforms. 86 - add wrapper for all of disk demos to support emmc. 89 - Added more ufi event to support dynamic sdcard capacity. 105 - Improved auido to support the audio2.0 in win10. 124 - Added host video camera support. [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/ |
D | MIMX8QX6_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/ |
D | MIMX8DX5_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/ |
D | MIMX8DX4_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/ |
D | MIMX8QX5_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/ |
D | MIMX8QX4_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/ |
D | MIMX8DX3_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/ |
D | MIMX8QX3_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/ |
D | MIMX8DX6_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/ |
D | MIMX8UX5_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/ |
D | MIMX8UX6_cm4_features.h | 14 ** mail: support@nxp.com 147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). … 196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */ 198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */ 224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */ 230 /* @brief Has Pretended Networking mode support. */ 232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */ 270 /* @brief If dma channel IRQ support parameter */ 335 /* @brief Has DMA support, bitfield CnSC[DMA]. */ 422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */ [all …]
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