Lines Matching full:support
14 ** mail: support@nxp.com
147 /* @brief Enable support for low voltage reference on option 1 reference (bitfield CFG[VREF1RNG]). …
196 /* @brief Has doze mode support (register bit field MCR[DOZE]). */
198 /* @brief Insatnce has doze mode support (register bit field MCR[DOZE]). */
224 /* @brief CAN instance support Flexible Data rate (CAN FD) protocol. */
230 /* @brief Has Pretended Networking mode support. */
232 /* @brief Does not support Supervisor Mode (bitfield MCR[SUPV]. */
270 /* @brief If dma channel IRQ support parameter */
335 /* @brief Has DMA support, bitfield CnSC[DMA]. */
422 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
424 /* @brief Has improved smart card (ISO7816 protocol) support. */
426 /* @brief Has local operation network (CEA709.1-B protocol) support. */
463 /* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register b…
483 /* @brief Has support the BCLK bypass mode when BCLK = MCLK. */
487 /* @brief Support Channel Mode (register bit fields TCR4[CHMOD]). */
489 /* @brief Support synchronous with another SAI. */
535 /* @brief MU does not support enable clock of the other core, CR[CLKE] or CCR[CLKE]. */
537 /* @brief MU does not support NMI, CR[NMI]. */
539 /* @brief MU does not support hold the other core reset. CR[RSTH] or CCR[RSTH]. */
547 /* @brief MU does not support check the other core power mode. SR[PM] or BSR[APM]. */
625 /* @brief Support Interrupt Coalesce */
629 /* @brief Has AVB Support. */
633 /* @brief Has Extend MDIO Support. */
637 /* @brief Support Interrupt Coalesce for each instance */
641 /* @brief Has AVB Support for each instance. */
645 /* @brief Has Extend MDIO Support for each instance. */
664 /* @brief Has external DMA support (VEND_SPEC[EXT_DMA_EN]) */
668 /* @brief Has SDR50 support (HOST_CTRL_CAP[SDR50_SUPPORT]) */
670 /* @brief Has SDR104 support (HOST_CTRL_CAP[SDR104_SUPPORT]) */
676 /* @brief If USDHC instance support 8 bit width */
678 /* @brief If USDHC instance support HS400 mode */
680 /* @brief If USDHC instance support 1v8 signal */
691 /* @brief Support TX ULPS */
713 /* @brief Has process identifier support. */
715 /* @brief Support instruction cache demote. */
738 /* @brief FLEXSPI support address shift. */