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/Zephyr-latest/include/zephyr/arch/arm64/
Dlib_helpers.h4 * SPDX-License-Identifier: Apache-2.0
15 /* All the macros need a memory clobber */
21 : "=r" (reg_val) :: "memory"); \
29 :: "r" (reg_val) : "memory"); \
35 ::: "memory"); \
39 static ALWAYS_INLINE uint64_t read_##reg(void) \
43 static ALWAYS_INLINE void write_##reg(uint64_t val) \
47 static ALWAYS_INLINE void zero_##reg(void) \
96 /* Armv8-R aarch64 mpu registers */
108 static ALWAYS_INLINE void enable_debug_exceptions(void) in enable_debug_exceptions()
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Dbarrier.h4 * SPDX-License-Identifier: Apache-2.0
19 static ALWAYS_INLINE void z_barrier_dmem_fence_full(void) in z_barrier_dmem_fence_full()
21 __asm__ volatile ("dmb sy" ::: "memory"); in z_barrier_dmem_fence_full()
24 static ALWAYS_INLINE void z_barrier_dsync_fence_full(void) in z_barrier_dsync_fence_full()
26 __asm__ volatile ("dsb sy" ::: "memory"); in z_barrier_dsync_fence_full()
29 static ALWAYS_INLINE void z_barrier_isync_fence_full(void) in z_barrier_isync_fence_full()
31 __asm__ volatile ("isb" ::: "memory"); in z_barrier_isync_fence_full()
/Zephyr-latest/include/zephyr/sys/
Dsys_io.h1 /* Port and memory mapped registers I/O operations */
6 * SPDX-License-Identifier: Apache-2.0
26 * @fn static inline void sys_out8(uint8_t data, io_port_t port);
36 * @fn static inline uint8_t sys_in8(io_port_t port);
47 * @fn static inline void sys_out16(uint16_t data, io_port_t port);
57 * @fn static inline uint16_t sys_in16(io_port_t port);
68 * @fn static inline void sys_out32(uint32_t data, io_port_t port);
78 * @fn static inline uint32_t sys_in32(io_port_t port);
89 * @fn static inline void sys_io_set_bit(io_port_t port, unsigned int bit)
99 * @fn static inline void sys_io_clear_bit(io_port_t port, unsigned int bit)
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/Zephyr-latest/include/zephyr/arch/riscv/
Datomic.h3 * SPDX-License-Identifier: Apache-2.0
13 /* The standard RISC-V atomic-instruction extension, "A", specifies
14 * the number of instructions that atomically read-modify-write memory,
15 * which RISC-V harts should support in order to synchronise harts
16 * running in the same memory space. This is the subset of RISC-V
17 * atomic-instructions not present in atomic_builtin.h file.
21 static ALWAYS_INLINE atomic_val_t atomic_swap(const atomic_t *target, atomic_val_t newval) in atomic_swap()
28 : "memory"); in atomic_swap()
33 static ALWAYS_INLINE atomic_val_t atomic_max(atomic_t *target, atomic_val_t value) in atomic_max()
40 : "memory"); in atomic_max()
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/Zephyr-latest/tests/kernel/mem_protect/mem_protect/src/
Dmem_domain.c4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/sys/libc-hooks.h> /* for z_libc_partition */
14 /* Special memory domain for test case purposes */
15 static struct k_mem_domain test_domain;
22 /* Maximum number of allowable memory partitions defined by the build */
23 #define NUM_RW_PARTS (CONFIG_MAX_DOMAIN_PARTITIONS - PARTS_USED)
28 /* Set of read-write buffers each in their own partition */
29 static volatile uint8_t __aligned(MEM_REGION_ALLOC)
31 static struct k_mem_partition rw_parts[NUM_RW_PARTS];
33 /* A single read-only partition */
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/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dfloat_regs_arm_gcc.h9 * SPDX-License-Identifier: Apache-2.0
20 static inline void _load_all_float_registers(struct fp_register_set *regs) in _load_all_float_registers()
23 "vldmia %0, {d0-d15};\n\t" in _load_all_float_registers()
24 "vldmia %1, {d16-d31};\n\t" in _load_all_float_registers()
25 : : "r" (&regs->fp_volatile), "r" (&regs->fp_non_volatile) in _load_all_float_registers()
29 static inline void _store_all_float_registers(struct fp_register_set *regs) in _store_all_float_registers()
32 "vstmia %0, {d0-d15};\n\t" in _store_all_float_registers()
33 "vstmia %1, {d16-d31};\n\t" in _store_all_float_registers()
34 : : "r" (&regs->fp_volatile), "r" (&regs->fp_non_volatile) in _store_all_float_registers()
35 : "memory" in _store_all_float_registers()
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/Zephyr-latest/drivers/bbram/
Dnpcx.h3 * SPDX-License-Identifier: Apache-2.0
25 static uint8_t bbram_npcx_emul_buffer_##inst[DT_INST_REG_SIZE_BY_NAME(inst, memory)]; \
26 static uint8_t bbram_npcx_emul_status_##inst; \
27 static const struct bbram_npcx_config bbram_cfg_##inst = { \
29 .size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
34 static const struct bbram_npcx_config bbram_cfg_##inst = { \
35 .base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
36 .size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/
Dcpu.h2 * Copyright (c) 2016-2021 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
10 static inline void cpu_sleep(void) in cpu_sleep()
15 static inline void cpu_dmb(void) in cpu_dmb()
18 /* NOTE: Refer to ARM Cortex-M Programming Guide to Memory Barrier in cpu_dmb()
21 * Implementation: In the Cortex-M processors data transfers are in cpu_dmb()
24 * Hence, there is no need to use a memory barrier instruction between in cpu_dmb()
25 * each access. Only a compiler memory clobber is sufficient. in cpu_dmb()
27 __asm__ volatile ("" : : : "memory"); in cpu_dmb()
29 /* FIXME: Add necessary host machine required Data Memory Barrier in cpu_dmb()
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/Zephyr-latest/include/zephyr/arch/x86/ia32/
Dsyscall.h4 * SPDX-License-Identifier: Apache-2.0
12 * included by the syscall interface architecture-abstraction header
33 /* Syscall invocation macros. x86-specific machine constraints used to ensure
39 static inline uintptr_t arch_syscall_invoke6(uintptr_t arg1, uintptr_t arg2, in arch_syscall_invoke6()
54 : "memory"); in arch_syscall_invoke6()
59 static inline uintptr_t arch_syscall_invoke5(uintptr_t arg1, uintptr_t arg2, in arch_syscall_invoke5()
70 : "memory"); in arch_syscall_invoke5()
75 static inline uintptr_t arch_syscall_invoke4(uintptr_t arg1, uintptr_t arg2, in arch_syscall_invoke4()
85 : "memory"); in arch_syscall_invoke4()
90 static inline uintptr_t arch_syscall_invoke3(uintptr_t arg1, uintptr_t arg2, in arch_syscall_invoke3()
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/Zephyr-latest/arch/xtensa/include/
Dxtensa_mpu_priv.h4 * SPDX-License-Identifier: Apache-2.0
16 #include <xtensa/config/core-isa.h>
19 * @defgroup xtensa_mpu_internal_apis Xtensa Memory Protection Unit (MPU) Internal APIs
65 /** Number of bits to shift for memory type in MPU entry register. */
68 /** Bit mask of memory type in MPU entry register. */
111 * @param memtype Memory type.
133 static ALWAYS_INLINE uint32_t xtensa_mpu_mpucfg_read(void) in xtensa_mpu_mpucfg_read()
149 static ALWAYS_INLINE uint32_t xtensa_mpu_mpuenb_read(void) in xtensa_mpu_mpuenb_read()
165 static ALWAYS_INLINE void xtensa_mpu_mpuenb_write(uint32_t mpuenb) in xtensa_mpu_mpuenb_write()
177 static ALWAYS_INLINE uint32_t xtensa_pptlb_probe(uintptr_t addr) in xtensa_pptlb_probe()
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/Zephyr-latest/tests/lib/newlib/thread_safety/src/
Dstress.c4 * SPDX-License-Identifier: Apache-2.0
8 * @file Newlib thread-safety stress test
11 * provided by newlib are thread safe (i.e. synchronised) and that the thread-
12 * specific contexts are properly handled (i.e. re-entrant).
32 static struct k_thread tdata[THREAD_COUNT];
33 static K_THREAD_STACK_ARRAY_DEFINE(tstack, THREAD_COUNT, STACK_SIZE);
35 static void malloc_thread(void *p1, void *p2, void *p3) in malloc_thread()
37 static ZTEST_BMEM atomic_t count; in malloc_thread()
46 /* Allocate memory block and write a unique value to it. */ in malloc_thread()
48 zassert_not_null(ptr, "Out of memory"); in malloc_thread()
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/Zephyr-latest/include/zephyr/arch/x86/
Darch.h3 * SPDX-License-Identifier: Apache-2.0
46 static ALWAYS_INLINE void arch_irq_unlock(unsigned int key) in arch_irq_unlock()
49 __asm__ volatile ("sti" ::: "memory"); in arch_irq_unlock()
53 static ALWAYS_INLINE void sys_out8(uint8_t data, io_port_t port) in sys_out8()
58 static ALWAYS_INLINE uint8_t sys_in8(io_port_t port) in sys_in8()
67 static ALWAYS_INLINE void sys_out16(uint16_t data, io_port_t port) in sys_out16()
72 static ALWAYS_INLINE uint16_t sys_in16(io_port_t port) in sys_in16()
81 static ALWAYS_INLINE void sys_out32(uint32_t data, io_port_t port) in sys_out32()
86 static ALWAYS_INLINE uint32_t sys_in32(io_port_t port) in sys_in32()
95 static ALWAYS_INLINE void sys_write8(uint8_t data, mm_reg_t addr) in sys_write8()
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/Zephyr-latest/tests/lib/newlib/heap_listener/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
17 * Function used by malloc() to obtain or free memory to the system.
22 static uintptr_t current_heap_end(void) in current_heap_end()
27 static ptrdiff_t heap_difference;
29 static void heap_resized(uintptr_t heap_id, void *old_heap_end, void *new_heap_end) in heap_resized()
33 heap_difference += ((char *)new_heap_end - (char *)old_heap_end); in heap_resized()
36 static HEAP_LISTENER_RESIZE_DEFINE(listener, HEAP_ID_LIBC, heap_resized);
45 * memory from the system.
51 TC_PRINT("Allocating memory...\n"); in ZTEST()
60 zassert_equal(current_heap_end() - saved_heap_end, heap_difference, in ZTEST()
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/Zephyr-latest/samples/subsys/logging/multidomain/remote/boards/
Dnrf5340dk_nrf5340_cpunet.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
11 /delete-property/ zephyr,ipc_shm;
12 zephyr,log-ipc = &ipc0;
15 reserved-memory {
16 /delete-node/ memory@20070000;
18 sram_ipc0: memory@20070000 {
22 sram_ipc1: memory@20078000 {
28 /delete-node/ ipc0;
31 compatible = "zephyr,ipc-openamp-static-vrings";
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/Zephyr-latest/samples/subsys/ipc/ipc_service/static_vrings/remote/boards/
Dnrf5340dk_nrf5340_cpunet.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
11 /delete-property/ zephyr,ipc_shm;
14 reserved-memory {
15 /delete-node/ memory@20070000;
17 sram_ipc0: memory@20070000 {
21 sram_ipc1: memory@20078000 {
27 /delete-node/ ipc0;
30 compatible = "zephyr,ipc-openamp-static-vrings";
31 memory-region = <&sram_ipc0>;
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Dlpcxpresso55s69_lpc55s69_cpu1.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 /delete-property/ zephyr,ipc;
16 /delete-property/ zephyr,ipc_shm;
19 /* Define memory regions for IPC
20 * Note that shared memory must have specific MPU attributes set.
22 sram4_ipc0: memory@20040000{
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region="SRAM4_IPC0";
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/
Dcpu.h2 * Copyright (c) 2016-2024 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
8 static inline void cpu_sleep(void) in cpu_sleep()
15 static inline void cpu_dmb(void) in cpu_dmb()
17 /* FIXME: Add necessary host machine required Data Memory Barrier in cpu_dmb()
18 * instruction along with the below defined compiler memory in cpu_dmb()
21 __asm__ volatile ("" : : : "memory"); in cpu_dmb()
/Zephyr-latest/tests/kernel/mem_slab/mslab_api/src/
Dtest_mslab_api.c4 * SPDX-License-Identifier: Apache-2.0
10 /* TESTPOINT: Statically define and initialize a memory slab*/
12 static char __aligned(BLK_ALIGN) tslab[BLK_SIZE * BLK_NUM];
13 static struct k_mem_slab mslab;
16 static K_THREAD_STACK_DEFINE(stack, STACKSIZE);
17 static struct k_thread HELPER;
33 * TESTPOINT: The memory slab's buffer contains @a slab_num_blocks in tmslab_alloc_free()
34 * memory blocks that are @a slab_block_size bytes long. in tmslab_alloc_free()
37 /* TESTPOINT: Allocate memory from a memory slab.*/ in tmslab_alloc_free()
38 /* TESTPOINT: @retval 0 Memory allocated.*/ in tmslab_alloc_free()
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/Zephyr-latest/soc/nordic/common/
Ddmm.c3 * SPDX-License-Identifier: Apache-2.0
30 * stored in memory sections spanning over memory regions.
31 * These are used to determine memory left for dynamic bounce buffer allocator to work with.
49 static const struct dmm_region dmm_regions[] = {
57 static struct dmm_heap *dmm_heap_find(void *region) in dmm_heap_find()
63 if (dh->region->dt_addr == (uintptr_t)region) { in dmm_heap_find()
71 static bool is_region_cacheable(const struct dmm_region *region) in is_region_cacheable()
73 return (IS_ENABLED(CONFIG_DCACHE) && (region->dt_attr & DT_MEM_CACHEABLE)); in is_region_cacheable()
76 static bool is_buffer_within_region(uintptr_t start, size_t size, in is_buffer_within_region()
82 static bool is_user_buffer_correctly_preallocated(void const *user_buffer, size_t user_length, in is_user_buffer_correctly_preallocated()
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/Zephyr-latest/samples/subsys/logging/multidomain/boards/
Dnrf5340dk_nrf5340_cpuapp.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
11 /delete-property/ zephyr,ipc_shm;
12 zephyr,log-ipc = &ipc0;
15 reserved-memory {
16 /delete-node/ memory@20070000;
18 sram_ipc0: memory@20070000 {
22 sram_ipc1: memory@20078000 {
28 /delete-node/ ipc0;
31 compatible = "zephyr,ipc-openamp-static-vrings";
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/Zephyr-latest/samples/subsys/ipc/ipc_service/static_vrings/boards/
Dnrf5340dk_nrf5340_cpuapp.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
11 /delete-property/ zephyr,ipc_shm;
14 reserved-memory {
15 /delete-node/ memory@20070000;
17 sram_ipc0: memory@20070000 {
21 sram_ipc1: memory@20078000 {
27 /delete-node/ ipc0;
30 compatible = "zephyr,ipc-openamp-static-vrings";
31 memory-region = <&sram_ipc0>;
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Dlpcxpresso55s69_lpc55s69_cpu0.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/ipc_service/static_vrings.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 /delete-property/ zephyr,ipc;
16 /delete-property/ zephyr,ipc_shm;
19 /* Define memory regions for IPC
20 * Note that shared memory must have specific MPU attributes set.
22 sram4_ipc0: memory@20040000{
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region="SRAM4_IPC0";
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/Zephyr-latest/drivers/memc/
DKconfig.sam2 # SPDX-License-Identifier: Apache-2.0
5 bool "Atmel Static Memory Controller (SMC)"
10 Enable Atmel Static Memory Controller.
/Zephyr-latest/drivers/firmware/scmi/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
14 bool "SCMI transport based on shared memory and doorbells"
20 Enable support for SCMI transport based on shared memory
32 bool "SCMI shared memory (SHMEM) driver"
36 Enable support for SCMI shared memory (SHMEM) driver.
39 int "SCMI shared memory (SHMEM) initialization priority"
45 bool "Transport layer has static channels"
47 Enable this if the SCMI transport layer uses static channels.
51 allocation scheme (i.e: use protocol-specific channels if
/Zephyr-latest/drivers/flash/
Dflash_ifx_cat1_qspi.c5 * SPDX-License-Identifier: Apache-2.0
35 static struct flash_parameters ifx_cat1_flash_parameters = {
67 /* The 8-bit command. 1 x I/O read command. */
73 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
92 * https://iot-webserver.aus.cypress.com/projects/iot_release/
93 * ASSETS/repo/mtb-pdl-cat1/develop/Latest/deploy/docs/
98 static cy_stc_smif_hybrid_region_info_t sfdp_slave_slot_0_region_info_storage[16];
102 static cy_stc_smif_hybrid_region_info_t *sfdp_slave_slot_0_region_info[16] = {
107 /* Specifies the number of address bytes used by the memory slave device. */
109 /* The size of the memory. */
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