Searched full:stands (Results 1 – 15 of 15) sorted by relevance
7 This compatible stands for all interrupt-controller blocks with two
7 This compatible stands for the stm32H7RS interrupt-controller block
7 This compatible stands for all ADC blocks similar to the one on STM32F4,
7 This compatible stands for all ADC blocks similar to the one on STM32F1,
22 Enable SBSA mode for PL011 driver. SBSA stands for
6 This compatible stands for all SPI hardware blocks matching the
17 called ivshmem, which stands for inter-VM Shared Memory.
54 * Postfix like 1_4_4 stands for the number of lines used for77 * SINGLE stands for single data rate for all phases.78 * DUAL stands for dual data rate for all phases.79 * S_S_D stands for single data rate for command and address phases but81 * S_D_D stands for single data rate for command phase but dual data rate
152 * MAX7219 only supports PIXEL_FORMAT_MONO01. 1 bit stands for 1 pixel. in max7219_write()
148 L2CAP stands for the Logical Link Control and Adaptation Protocol. It is
383 - TSC stands for Technical Steering Committee. The issue is to be discussed in the
43 with a minimal interrupt latency. It stands out for its compatibility with existing Cortex-M profile
567 Security Mode 1 Level 4 stands for authenticated LE Secure Connections
760 * All occurrences of ``set_sirk`` have been changed to just ``sirk`` as the ``s`` in ``sirk`` stands
994 * :github:`28193` - include/drivers/flash: API stands mistakenly unrestricted alignment of writes.
