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/Zephyr-Core-3.5.0/dts/bindings/phy/
Dcan-transceiver-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "can-transceiver-gpio"
8 include: can-transceiver.yaml
11 enable-gpios:
12 type: phandle-array
18 standby-gpios:
19 type: phandle-array
21 GPIO to use to put the CAN transceiver into standby. This GPIO is driven
/Zephyr-Core-3.5.0/drivers/can/transceiver/
Dcan_transceiver_gpio.c4 * SPDX-License-Identifier: Apache-2.0
16 /* Does any devicetree instance have an enable-gpios property? */
20 /* Does any devicetree instance have a standby-gpios property? */
35 const struct can_transceiver_gpio_config *config = dev->config; in can_transceiver_gpio_set_state()
39 if (config->enable_gpio.port != NULL) { in can_transceiver_gpio_set_state()
40 err = gpio_pin_set_dt(&config->enable_gpio, enabled ? 1 : 0); in can_transceiver_gpio_set_state()
43 return -EIO; in can_transceiver_gpio_set_state()
49 if (config->standby_gpio.port != NULL) { in can_transceiver_gpio_set_state()
50 err = gpio_pin_set_dt(&config->standby_gpio, enabled ? 0 : 1); in can_transceiver_gpio_set_state()
52 LOG_ERR("failed to set standby GPIO pin (err %d)", err); in can_transceiver_gpio_set_state()
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/Zephyr-Core-3.5.0/samples/boards/stm32/power_mgmt/standby_shutdown/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
36 GPIO_DT_SPEC_GET_OR(SW0_NODE, gpios, {0});
39 GPIO_DT_SPEC_GET(DT_ALIAS(led0), gpios);
45 /* Configure wake-up features */ in config_wakeup_features()
46 /* WKUP2(PC13) only , - active low, pull-up */ in config_wakeup_features()
47 /* Set pull-ups for standby modes */ in config_wakeup_features()
72 printk("Release the user button to wake-up\n\n"); in thread_poweroff_standby_mode()
79 printk("Standby Mode requested\n"); in thread_poweroff_standby_mode()
80 printk("Release the user button to exit from Standby Mode\n\n"); in thread_poweroff_standby_mode()
85 /* stay in Standby mode until wakeup line activated */ in thread_poweroff_standby_mode()
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/Zephyr-Core-3.5.0/dts/bindings/sensor/
Dst,vl53l1x.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 xshut-gpios:
12 type: phandle-array
15 standby (if VDD is present) or complete power off (if
20 int-gpios:
21 type: phandle-array
/Zephyr-Core-3.5.0/boards/arm/mr_canhubk3/
Dmr_canhubk3.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
16 model = "NXP MR-CANHUBK3";
24 zephyr,code-partition = &code_partition;
26 zephyr,shell-uart = &lpuart2;
27 zephyr,flash-controller = &mx25l6433f;
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/Zephyr-Core-3.5.0/drivers/serial/
Duart_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
51 (void)gpio_pin_interrupt_configure(gpio, (find_msb_set(pins) - 1), in uart1_wui_isr()
54 /* Refresh console expired time if got UART Rx wake-up event */ in uart1_wui_isr()
59 * The pm state of it8xxx2 chip only supports standby, so here we in uart1_wui_isr()
60 * can directly set the constraint for standby. in uart1_wui_isr()
63 k_work_reschedule(&uart_console_data->rx_refresh_timeout_work, delay); in uart1_wui_isr()
71 (void)gpio_pin_interrupt_configure(gpio, (find_msb_set(pins) - 1), in uart2_wui_isr()
74 /* Refresh console expired time if got UART Rx wake-up event */ in uart2_wui_isr()
79 * The pm state of it8xxx2 chip only supports standby, so here we in uart2_wui_isr()
80 * can directly set the constraint for standby. in uart2_wui_isr()
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/Zephyr-Core-3.5.0/boards/arm/rddrone_fmuk66/
Drddrone_fmuk66.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include "rddrone_fmuk66-pinctrl.dtsi"
21 pwm-led0 = &red_pwm_led;
22 pwm-led1 = &green_pwm_led;
23 pwm-led2 = &blue_pwm_led;
25 red-pwm-led = &red_pwm_led;
26 green-pwm-led = &green_pwm_led;
27 blue-pwm-led = &blue_pwm_led;
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/Zephyr-Core-3.5.0/boards/arm/olimexino_stm32/
Dolimexino_stm32.dts2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f1/stm32f103r(8-b)tx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "Olimex OLIMEXINO-STM32 board";
18 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
27 gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
31 gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
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/Zephyr-Core-3.5.0/samples/boards/ti/cc13x2_cc26x2/system_off/src/
Dmain.c5 * SPDX-License-Identifier: Apache-2.0
17 static const struct gpio_dt_spec sw0_gpio = GPIO_DT_SPEC_GET(DT_ALIAS(sw0), gpios);
36 printk("%s: device not ready.\n", sw0_gpio.port->name); in main()
47 printk("Busy-wait %u s\n", BUSY_WAIT_S); in main()
53 printk("Sleep %u s (STANDBY)\n", SLEEP_S); in main()
/Zephyr-Core-3.5.0/dts/bindings/can/
Dcan-controller.yaml6 bus-speed:
11 sample-point:
17 (`sjw`, `prop-seg`, `phase-seg1`, and `phase-seg2`).
25 Initial time quanta of resynchronization jump width (ISO 11898-1).
28 timing parameters. Default of 1 matches the default value previously used for all in-tree CAN
32 prop-seg:
36 Initial time quanta of propagation segment (ISO 11898-1). Deprecated in favor of setting
38 phase-seg1:
42 Initial time quanta of phase buffer 1 segment (ISO 11898-1). Deprecated in favor of setting
44 phase-seg2:
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/Zephyr-Core-3.5.0/boards/arm/stm32f3_seco_d23/
Dstm32f3_seco_d23.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f3/stm32f302v(b-c)tx-pinctrl.dtsi>
12 model = "SECO JUNO SBC-D23 board (STM32F302VCT6)";
13 compatible = "seco,stm32f3-d23";
17 zephyr,code-partition = &slot0_partition;
18 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
27 gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>;
28 label = "LED-1";
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/Zephyr-Core-3.5.0/boards/arm/stm32h7b3i_dk/
Dstm32h7b3i_dk.dts2 * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32h7b3i-dk";
20 zephyr,shell-uart = &usart1;
28 compatible = "gpio-leds";
30 gpios = <&gpiog 11 GPIO_ACTIVE_HIGH>;
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/Zephyr-Core-3.5.0/dts/riscv/ite/
Dit8xxx2.dtsi3 * Copyright (c) 2019-2020 Jyunlin Chen <jyunlin.chen@ite.com.tw>
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/dt-util.h>
10 #include <zephyr/dt-bindings/adc/adc.h>
11 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
12 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/i2c/it8xxx2-i2c.h>
15 #include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
16 #include <zephyr/dt-bindings/pwm/pwm.h>
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/Zephyr-Core-3.5.0/boards/arm/dragino_nbsn95/doc/
Dindex.rst3 Dragino NBSN95 NB-IoT Sensor Node
9 The Dragino NBSN95 NB-IoT Sensor Node for IoT allows users to develop
10 applications with NB-IoT connectivity via the Quectel BC95-G.
12 low-power communication, ARM |reg| Cortex |reg|-M0 core-based
17 - STM32L072CZ MCU
18 - Quectel BC95-G NB-IoT
19 - Expansion connectors:
20 - PMOD
21 - Li/SOCI2 Unchargable Battery
22 - GPIOs exposed via screw terminals on the carrier board
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/Zephyr-Core-3.5.0/boards/arm/dragino_lsn50/doc/
Dindex.rst12 low-power communication, ARM |reg| Cortex |reg|-M0 core-based
17 - STM32L072CZ MCU
18 - SX1276/SX1278 LoRa Transceiver
19 - Expansion connectors:
21 - PMOD
22 - Li/SOCI2 Unchargable Battery
23 - GPIOs exposed via screw terminals on the carrier board
24 - Housing
37 - Ultra-low-power (down to 0.29 µA Standby mode and 93 uA/MHz run mode)
38 - Core: ARM |reg| 32-bit Cortex |reg|-M0+ CPU, frequency up to 32 MHz
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/Zephyr-Core-3.5.0/drivers/lora/
Dsx127x.c5 * SPDX-License-Identifier: Apache-2.0
108 * Those macros must be in sync with 'power-amplifier-output' dts property.
125 BUILD_ASSERT(0, "None of rfo-enable-gpios, pa-boost-enable-gpios and "
126 "power-amplifier-output has been specified. "
127 "Look at semtech,sx127x-base.yaml to fix that.");
334 int dio = work - dev_data.dio_work; in sx127x_dio_work_handle()
344 pin = find_lsb_set(pins) - 1; in sx127x_irq_callback()
359 /* Setup DIO gpios */ in SX127xIoIrqInit()
367 sx127x_dios[i].port->name); in SX127xIoIrqInit()
469 pa_config |= (power - 5) & SX127X_PACONFIG_OUTPUTPOWER_MASK; in SX127xSetRfTxPower()
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/Zephyr-Core-3.5.0/drivers/flash/
Dspi_nor.c2 * Copyright (c) 2018 Savoir-Faire Linux.
8 * SPDX-License-Identifier: Apache-2.0
34 * * When CSn is deasserted the device enters a standby mode.
35 * * Some devices support a Deep Power-Down mode which reduces current
36 * to as little as 0.1% of standby.
44 * * PM_DEVICE_STATE_ACTIVE covers both active and standby modes;
46 * deep-power-down mode.
73 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
75 /* Build-time data associated with the device. */
95 /* Expected JEDEC ID, from jedec-id property */
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/Zephyr-Core-3.5.0/drivers/gpio/
Dgpio_intel.c2 * Copyright (c) 2018-2019 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
14 * both GPIOs and Pinmuxing function. This driver provides
17 * Due to GPIO callback only allowing 32 pins (as a 32-bit mask) at once,
18 * each set is further sub-divided into multiple devices, so
93 ((const struct gpio_intel_config *)(_dev)->config)
94 #define DEV_DATA(_dev) ((struct gpio_intel_data *)(_dev)->data)
140 struct gpio_intel_data *data = dev->data; in check_perm()
141 const struct gpio_intel_config *cfg = dev->config; in check_perm()
144 pin_offset = cfg->pin_offset; in check_perm()
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/Zephyr-Core-3.5.0/drivers/can/
Dcan_tcan4x5x.c4 * SPDX-License-Identifier: Apache-2.0
21 * The register definitions correspond to those found in the TI TCAN4550-Q1 datasheet, revision D
209 * Only compile in support for the optional GPIOs if at least one enabled tcan4x5x device tree node
241 const struct can_mcan_config *mcan_config = dev->config; in tcan4x5x_read()
242 const struct tcan4x5x_config *tcan_config = mcan_config->custom; in tcan4x5x_read()
271 /* Maximum transfer size is 256 32-bit words */ in tcan4x5x_read()
275 err = spi_transceive_dt(&tcan_config->spi, &tx, &rx); in tcan4x5x_read()
292 const struct can_mcan_config *mcan_config = dev->config; in tcan4x5x_write()
293 const struct tcan4x5x_config *tcan_config = mcan_config->custom; in tcan4x5x_write()
321 /* Maximum transfer size is 256 32-bit words */ in tcan4x5x_write()
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/Zephyr-Core-3.5.0/doc/releases/
Drelease-notes-2.7.rst17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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