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/Zephyr-latest/soc/atmel/sam/common/
DKconfig15 crystal needs to stabilize after power-up.
29 crystal needs to stabilize after power-up.
Dsoc_pmc.h183 /* Wait for the Fast RC to stabilize */ in soc_pmc_switch_mainck_to_fastrc()
192 /* Wait for the Fast RC to stabilize */ in soc_pmc_switch_mainck_to_fastrc()
211 /* Wait for the Fast RC to stabilize */ in soc_pmc_osc_enable_fastrc()
220 /* Wait for the Fast RC to stabilize */ in soc_pmc_osc_enable_fastrc()
259 /* Wait the main Xtal to stabilize */ in soc_pmc_osc_enable_main_xtal()
333 /* Wait for the Xtal to stabilize */ in soc_pmc_switch_mainck_to_xtal()
/Zephyr-latest/boards/nordic/thingy52/
Dboard.c27 k_sleep(K_MSEC(1)); /* Wait for the rail to come up and stabilize */ in pwr_ctrl_init()
/Zephyr-latest/scripts/dts/
DREADME.txt30 Eventually, as APIs stabilize, the python-devicetree code in this
/Zephyr-latest/dts/bindings/lora/
Dsemtech,sx126x-base.yaml61 Startup delay to let the TCXO stabilize after TCXO power on.
/Zephyr-latest/samples/sensor/veaa_x_3/src/
Dmain.c49 /* Sleep before get to allow DAC and ADC to stabilize */ in main()
/Zephyr-latest/drivers/watchdog/
Dwdt_fwdgt_gd32.c160 /* Turn on and wait stabilize system clock oscillator. */ in gd32_fwdgt_init()
/Zephyr-latest/dts/bindings/sensor/
Dti,fdc2x1x.yaml203 stabilize before initiation of a conversion on Channel X.
/Zephyr-latest/soc/nxp/imxrt/imxrt10xx/
Dpower.c129 /* Wait for it to stabilize */ in bandgap_set()
/Zephyr-latest/drivers/pwm/
Dpwm_pca9685.c71 * Time allowed for the oscillator to stabilize after the PCA9685's
/Zephyr-latest/drivers/serial/
Dleuart_gecko.c279 /* Select LFXO for LEUARTs (and wait for it to stabilize) */ in leuart_gecko_init()
/Zephyr-latest/drivers/input/
Dinput_kbd_matrix.c117 /* Allow the matrix to stabilize before reading it */ in input_kbd_matrix_scan()
/Zephyr-latest/samples/subsys/usb/uac2_implicit_feedback/src/
Dmain.c153 * will stabilize after a while anyway. in uac2_data_recv_cb()
/Zephyr-latest/drivers/display/
Ddisplay_gc9x01x.c314 * This is to allow time for the supply voltages and clock circuits stabilize in gc9x01x_exit_sleep()
/Zephyr-latest/doc/project/
Drelease_process.rst69 new features has passed, and that the time to stabilize the next release of the
/Zephyr-latest/tests/drivers/counter/maxim_ds3231_api/src/
Dtest_counter.c802 /* Give required clocks some time to stabilize. In particular, nRF SoCs in counter_setup()
/Zephyr-latest/drivers/clock_control/
Dclock_control_mchp_xec.c447 * NOTE: Crystal requires ~300 ms to stabilize.
/Zephyr-latest/tests/drivers/counter/counter_basic_api/src/
Dtest_counter.c1119 /* Give required clocks some time to stabilize. In particular, nRF SoCs in counter_setup()
/Zephyr-latest/tests/net/socket/misc/src/
Dmain.c814 /* Let the system stabilize and cleanup itself */ in test_ipv4_mapped_to_ipv6_server()