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/Zephyr-latest/include/zephyr/net/
Dphy.h31 /** @brief Ethernet link speeds. */
133 * This route configures the advertised link speeds.
136 * @param speeds OR'd link speeds to be advertised by the PHY
143 enum phy_link_speed speeds) in phy_configure_link() argument
148 return api->cfg_link(dev, speeds); in phy_configure_link()
Dmii.h147 /** Advertise all speeds */
/Zephyr-latest/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml8 unique two-wire bus, made up of one clock line and one data line with speeds
15 When using speeds above standard mode, user may need adjust clock and data
33 std-<line> configures fast/fast-plus mode speeds and hs-<line> selects the
/Zephyr-latest/modules/nanopb/
DKconfig38 decoding with memory buffers. Speeds up execution and slightly
/Zephyr-latest/drivers/i2c/
DKconfig.it8xxx211 Supported Speeds: 100kHz, 400kHz and 1MHz.
Di2c_bitbang.c13 * the Standard-mode and Fast-mode speeds and doesn't support optional
/Zephyr-latest/dts/bindings/ethernet/
Datmel,gmac-common.yaml44 value, enables driver to configure 10 and 100Mbit/s speeds.
Dxlnx,gem.yaml48 interval, link-speed and advertise-lower-link-speeds should be checked
75 perty advertise-lower-link-speeds is set, advertisement of the link
83 advertise-lower-link-speeds:
87 the MDIO bus to include link speeds lower than the nominal value
/Zephyr-latest/drivers/ethernet/phy/
Dphy_microchip_ksz8081.c325 enum phy_link_speed speeds) in phy_mc_ksz8081_cfg_link() argument
357 if (speeds & LINK_FULL_100BASE_T) { in phy_mc_ksz8081_cfg_link()
362 if (speeds & LINK_HALF_100BASE_T) { in phy_mc_ksz8081_cfg_link()
367 if (speeds & LINK_FULL_10BASE_T) { in phy_mc_ksz8081_cfg_link()
372 if (speeds & LINK_HALF_10BASE_T) { in phy_mc_ksz8081_cfg_link()
Dphy_realtek_rtl8211f.c282 enum phy_link_speed speeds) in phy_rt_rtl8211f_cfg_link() argument
321 if (speeds & LINK_FULL_100BASE_T) { in phy_rt_rtl8211f_cfg_link()
326 if (speeds & LINK_HALF_100BASE_T) { in phy_rt_rtl8211f_cfg_link()
331 if (speeds & LINK_FULL_10BASE_T) { in phy_rt_rtl8211f_cfg_link()
336 if (speeds & LINK_HALF_10BASE_T) { in phy_rt_rtl8211f_cfg_link()
343 if (speeds & LINK_FULL_1000BASE_T) { in phy_rt_rtl8211f_cfg_link()
Dphy_ti_dp83825.c361 static int phy_ti_dp83825_cfg_link(const struct device *dev, enum phy_link_speed speeds) in phy_ti_dp83825_cfg_link() argument
404 if (speeds & LINK_FULL_100BASE_T) { in phy_ti_dp83825_cfg_link()
410 if (speeds & LINK_HALF_100BASE_T) { in phy_ti_dp83825_cfg_link()
416 if (speeds & LINK_FULL_10BASE_T) { in phy_ti_dp83825_cfg_link()
422 if (speeds & LINK_HALF_10BASE_T) { in phy_ti_dp83825_cfg_link()
/Zephyr-latest/boards/openisa/rv32m1_vega/support/
Dopenocd_rv32m1_vega_zero_riscy.cfg33 # on burst reads and writes to improve download speeds.
Dopenocd_rv32m1_vega_ri5cy.cfg33 # on burst reads and writes to improve download speeds.
/Zephyr-latest/subsys/sd/
DKconfig101 reduce code size, at the cost of data transfer speeds.
/Zephyr-latest/dts/bindings/bluetooth/
Dinfineon,cyw43xxx-bt-hci.yaml37 speeds for firmware download (fw-download-speed) and HCI operation
/Zephyr-latest/drivers/serial/
DKconfig.nrfx_uart_instance62 that with higher speeds and/or high cpu load some data can be lost.
/Zephyr-latest/doc/hardware/peripherals/
Dw1.rst14 The 1-Wire bus supports longer bus lines than I2C, while it reaches speeds of up
/Zephyr-latest/include/zephyr/dt-bindings/power/
Dimx_spc.h10 * of set points to determine the clock speeds and states of cores, as well
/Zephyr-latest/tests/kernel/timer/timer_behavior/
DREADME69 depends on the board's clock). Different clocks run at different speeds, so
/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/
Dcy8cproto_062_4343w.dts69 /* Configuration UART speeds for firmware download (fw-download-speed)
/Zephyr-latest/dts/bindings/stepper/adi/
Dadi,trinamic-ramp-generator.yaml113 Set this parameter to disable CoolStep at low speeds, where it cannot work reliably.
/Zephyr-latest/doc/services/llext/
Dconfig.rst110 This speeds up the symbol lookup process by allowing usage of
/Zephyr-latest/tests/boards/native_sim/rtc/src/
Dmain.c58 /* This ratio adjustments lead to test speeds 0.25x, 0.5x, 1x, 2x & 4x*/ in ZTEST()
/Zephyr-latest/drivers/flash/
DKconfig30 it advantage of higher write speeds at a cost of larger erase block.
/Zephyr-latest/drivers/ethernet/nxp_enet/
Deth_nxp_enet.c462 enum phy_link_speed speeds = LINK_HALF_10BASE_T | LINK_FULL_10BASE_T | in nxp_enet_phy_configure() local
467 speeds |= (LINK_HALF_1000BASE_T | LINK_FULL_1000BASE_T); in nxp_enet_phy_configure()
471 return phy_configure_link(phy, speeds); in nxp_enet_phy_configure()

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