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/Zephyr-latest/include/zephyr/drivers/flash/
Dflash_simulator.h15 * @brief Flash simulator specific API.
17 * Extension for flash simulator.
21 * @brief Obtain a pointer to the RAM buffer used but by the simulator
24 * in which the flash simulator emulates its flash memory content.
26 * @param[in] dev flash simulator device pointer.
/Zephyr-latest/subsys/testsuite/include/zephyr/
Dbusy_sim.h12 * @brief Start busy simulator.
28 * @param cb Callback called from the context of the busy simulator timeout. If ZLI interrupt
29 * is used for busy simulator counter then kernel API cannot be used from that callback.
35 /** @brief Stop busy simulator. */
/Zephyr-latest/soc/native/inf_clock/
DKconfig16 Which native simulator microcontroller/CPU number is this image targeting.
18 native simulator as their runner.
42 This option can be used to provide the native simulator with other MCUs/Cores images which have
45 have it produce the final link with the native simulator runner and the other MCU images.
/Zephyr-latest/drivers/flash/
DKconfig.simulator1 # Flash simulator config
7 bool "Flash simulator"
13 Enable the flash simulator.
80 Gather statistic measurement for flash simulator operations using the
/Zephyr-latest/scripts/pylib/twister/twisterlib/
Dtestinstance.py229 simulator = self.platform.simulator_by_name(options.sim_name)
234 elif simulator:
235 if simulator.name == "qemu":
243 handler = SimulationHandler(self, simulator.name, *common_args)
244 handler.ready = simulator.is_runnable()
269 simulator = self.platform.simulator_by_name(simulation)
270 if os.name == 'nt' and simulator:
272 if simulator.name not in ('na', 'qemu'):
276 if simulator.name == 'qemu' and 'QEMU_BIN_PATH' not in os.environ:
290 (simulator and simulator.name in SUPPORTED_SIMS and \
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Dplatform.py21 class Simulator: class
22 """Class representing a simulator"""
34 return f"Simulator(name: {self.name}, exec: {self.exec})"
37 if isinstance(other, Simulator):
78 self.simulators: list[Simulator] = []
137 Simulator(data) for data in variant_data.get(
179 def simulator_by_name(self, sim_name: str | None) -> Simulator | None:
/Zephyr-latest/tests/benchmarks/latency_measure/boards/
Dintel_adsp_ace15_mtpm_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
Dintel_adsp_ace20_lnl_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
Dintel_adsp_ace30_ptl_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
/Zephyr-latest/tests/benchmarks/sched/boards/
Dintel_adsp_ace15_mtpm_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
Dintel_adsp_ace20_lnl_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
Dintel_adsp_ace30_ptl_sim.conf2 # and the simulator runs in single thread bouncing through
4 # waiting. This makes each simulator run too long for CI.
/Zephyr-latest/boards/native/doc/
Darch_soc.rst14 The native simulator in combination with the POSIX architecture and the inf_clock SOC layer,
216 Normally those would be debugged with a cycle accurate Instruction Set Simulator
287 With a cycle accurate instruction set simulator you compile targeting either
291 The simulator loads your binary, slowly interprets each instruction, and
311 It only describes the new native simulator based architecture used by targets built with the
321 :alt: Zephyr layering in a native simulator build
329 :alt: native_sim boards and the native simulator
332 Relationship between Zephyr, the native_sim target and the native simulator
340 Then the `native simulator <https://github.com/BabbleSim/native_simulator/>`_ runner will be built.
346 The native simulator runner provides the Linux program entry point, command line argument parsing,
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Dbsim_boards_design.rst21 These boards use the `native simulator`_ and the :ref:`POSIX architecture<Posix arch>` to build
37 .. _native simulator:
40 .. _native simulator design documentation:
114 and native simulator runner with the bsim boards.
128 Relationship between Zephyr, the native simulator, the nRF HW models and BabbleSim
132 nrf_bsim targets, you are using the `native simulator`_, which is being built together with and
136 The native simulator runner is built together with the HW models which match your desired target.
141 :alt: nrf_bsim boards and the native simulator
144 Relationship between Zephyr, the native simulator, the nRF HW models and BabbleSim.
149 simulator runner into a single executable.
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/Zephyr-latest/boards/native/nrf_bsim/
DKconfig13 It needs the BabbleSim simulator both in compile time and to execute
24 It needs the BabbleSim simulator both in compile time and to execute
35 It needs the BabbleSim simulator both in compile time and to execute
46 It needs the BabbleSim simulator both in compile time and to execute
/Zephyr-latest/boards/native/common/
Dnatsim_linker_script.ld9 * @brief Extra linker command/script file for the native simulator runner
21 * Note this script augments the default native simulator linker script
/Zephyr-latest/scripts/native_simulator/common/src/
Dmain.c9 * Native simulator entry point (main)
53 * Run all early native simulator initialization steps, including command
57 * Note: This API should normally only be called by the native simulator main()
93 * Execute the simulator for at least the specified timeout, then
98 * Note: This API should normally only be called by the native simulator main()
/Zephyr-latest/subsys/logging/backends/
DKconfig.xtensa_sim5 bool "Xtensa simulator backend"
10 Enable backend in xtensa simulator
/Zephyr-latest/scripts/pylib/pytest-twister-harness/tests/resources/
Dshell_simulator.py6 Simple shell simulator.
17 print('Start shell simulator', flush=True)
/Zephyr-latest/soc/intel/intel_adsp/
DKconfig19 bool "Intel ADSP Simulator"
22 Running this SoC family in a simulator.
29 Select if simulator doesn't use the normal secondary core flow
97 of an enclosing simulator process. All window contents will
/Zephyr-latest/scripts/native_simulator/common/src/include/
Dnsi_main_semipublic.h18 * replace the native simulator main loop.
24 * simulator main() is built in.
/Zephyr-latest/arch/posix/core/nsi_compat/
Dnsi_compat.c9 * from Native simulator components into the POSIX architecture.
12 * the migration towards the Native simulator.
/Zephyr-latest/arch/posix/core/
Dposix_core_nsi.c8 * Interfacing between the POSIX arch and the Native Simulator (nsi) CPU thread emulator
10 * This posix architecture "bottom" will be used when building with the native simulator.
/Zephyr-latest/include/zephyr/mgmt/ec_host_cmd/
Dsimulator.h12 * @brief Header for commands to interact with the simulator outside of normal
22 * When this host command simulator device should send data to the host, it
/Zephyr-latest/boards/cdns/xt-sim/
Dboard.yml3 full_name: Xtensa simulator

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