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/Zephyr-Core-3.5.0/doc/kernel/services/synchronization/
Dcondvar.rst31 of those waiting threads and thus allow them to continue by signaling on
93 Signaling a Condition Variable
/Zephyr-Core-3.5.0/dts/bindings/pinctrl/
Dquicklogic,eos-s3-pinctrl.yaml67 fabric-controlled for signaling with FPGA,
/Zephyr-Core-3.5.0/samples/drivers/led_apa102/
DREADME.rst24 signaling, which may require a level translator, such as the
/Zephyr-Core-3.5.0/subsys/net/l2/ethernet/gptp/
Dgptp_messages.h94 /* Signaling Interval Flags. */
98 /* Signaling Interval Values. */
433 * @brief Handle Signaling message.
Dgptp.c301 "SIGNALING", in gptp_handle_msg()
308 PRINT_INFO("SIGNALING", hdr, pkt); in gptp_handle_msg()
Dgptp_data_set.h421 /** Current Signaling sequence id for this port. */
/Zephyr-Core-3.5.0/samples/drivers/led_lpd8806/
DREADME.rst23 signaling, which may require a level translator, such as the
/Zephyr-Core-3.5.0/doc/services/device_mgmt/
Dota.rst13 infrastructure to host the firmware binary and implement a method of signaling
/Zephyr-Core-3.5.0/tests/arch/arc/arc_dsp_sharing/src/
Dcalculation_arc.c45 /* Semaphore for signaling end of test */
Dload_store.c44 /* Semaphore for signaling end of test */
/Zephyr-Core-3.5.0/include/zephyr/drivers/usb_c/
Dusbc_tc.h173 * the potential for USB PD signaling on CC as described in the state definitions.
180 * the potential for USB PD signaling on CC as described in the state definitions.
Dusbc_pd.h99 * sufficient time to process Hard Reset Signaling before
107 * sufficient time to process Hard Reset Signaling before
/Zephyr-Core-3.5.0/tests/kernel/fpu_sharing/generic/src/
Dpi.c65 /* Semaphore for signaling end of test */
Dload_store.c99 /* Semaphore for signaling end of test */
/Zephyr-Core-3.5.0/doc/connectivity/networking/api/
Dnet_mgmt.rst162 Signaling a network event
/Zephyr-Core-3.5.0/lib/posix/
Dcond.c128 LOG_DBG("Signaling cond %p", cv); in pthread_cond_signal()
/Zephyr-Core-3.5.0/include/zephyr/drivers/usb/
Duhc.h242 * at the end of reset signaling.
310 * bus resume signaling. The SoF generator should subsequently start within 3ms.
/Zephyr-Core-3.5.0/subsys/bluetooth/host/
Dl2cap_br.c67 /* Signaling channel flags */
78 /* Pool for outgoing BR/EDR signaling packets, min MTU is 48 */
264 * seconds. One RTX timer shall exist for each outstanding signaling in l2cap_br_chan_send_req()
1380 LOG_ERR("Too small L2CAP signaling PDU"); in l2cap_br_recv()
1387 LOG_DBG("Signaling code 0x%02x ident %u len %u", hdr->code, hdr->ident, len); in l2cap_br_recv()
/Zephyr-Core-3.5.0/arch/riscv/
DKconfig188 intended for inter-hart interrupt signaling and so retained for that
/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/
Dl2cap-pics.rst83 TSPC_L2CAP_2_40 True Support of Low Energy signaling channel (C.13)
/Zephyr-Core-3.5.0/subsys/sd/
Dsdmmc.c619 LOG_DBG("Card supports 1.8V signaling"); in sdmmc_card_init()
627 * If card is high capacity (SDXC or SDHC), and supports 1.8V signaling, in sdmmc_card_init()
/Zephyr-Core-3.5.0/include/zephyr/tracing/
Dtracing.h821 * @brief Trace Conditional Variable signaling start
827 * @brief Trace Conditional Variable signaling blocking
834 * @brief Trace Conditional Variable signaling outcome
/Zephyr-Core-3.5.0/tests/bsim/bluetooth/host/l2cap/split/tester/src/
Dmain.c225 /* signaling PDU */ in handle_l2cap()
/Zephyr-Core-3.5.0/subsys/usb/usb_c/
Dusbc_prl.c321 * are sent or received; only Hard Reset Signaling is present in prl_run()
990 * signaling is received by the PHY Layer. in prl_hr_wait_for_request_run()
Dusbc_pe_snk_states.c543 /* Request the generation of Hard Reset Signaling by the PHY Layer */ in pe_snk_hard_reset_entry()

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