Searched full:settings (Results 1 – 25 of 42) sorted by relevance
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| /hal_microchip-latest/mpfs/mpfs_hal/common/nwc/ |
| D | mss_nwc_init.c | 92 * IO settings and IO MUX in mss_nwc_init()
109 * SCB access settings in mss_nwc_init()
169 * Configure IOMUX and I/O settings for bank 2 and 4 in mss_nwc_init()
255 * 2) IO configuration settings in mss_nwc_init()
265 * 3) Training IP settings in mss_nwc_init()
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| D | mss_io.c | 56 * Bank 4 and 2 settings, the 38 MSSIO.
81 * Bank 4 and 2 settings, the 38 MSSIO.
108 * Bank 4 and 2 settings, the 38 MSSIO.
174 * The following settings are applied if MMSIO unused/off
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| D | mss_pll.h | 131 3. MSS PLL clock is setup with required settings
150 settings = 00=/1, 01=/2, 01=/4, 01=/8
257 @param option 1 => soft reset, load RPC settings
329 @param option 1 => soft reset, load RPC settings
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| D | mss_nwc_init.h | 101 SCB access settings on reset.
107 Note: These settings are used even after we change the MSS clock from SCB
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| D | mss_ddr.h | 156 offset for each lane until data match occurs. The settings are recorded by the
364 /* Write latency min/max settings If write calibration fails
379 * Some settings that are only used during testing in new DDR setup
1018 Calibration settings derived during write training
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| D | mss_sgmii.c | 462 * Auto-calibration supply ramp time settings in ddr_pvt_calibration()
467 * VS bit settings in ddr_pvt_calibration()
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| D | mss_pll.c | 302 * @param option 1 => soft reset, load RPC settings
616 * @param option 1 => soft reset, load RPC settings
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| D | mss_sgmii.h | 236 sgmii_setup() sets up the SGMII using settings from Libero
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| D | mss_ddr.c | 449 * Use obtained settings in ddr_setup()
806 * Calibrate DDR I/O here, once all RPC settings correct in ddr_setup()
2518 * Select VS bits for DDR mode selected --- set dynamic pc bit settings to in set_ddr_mode_reg_and_vs_bits()
2824 * todo: replace with Libero settings below, once values verified in set_ddr_rpc_regs()
4107 * These settings come from config tool
4842 * The settings come fro m Libero
4847 * settings come from Libero, along with setting unused MSS DDR I/O to
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| D | mss_io_config.h | 129 * \brief Bank 2 and 4 voltage settings
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| /hal_microchip-latest/mpfs/boards/icicle-kit-es/platform_config/mpfs_hal_config/ |
| D | mss_sw_config.h | 21 The mss_sw_config.h has the default software configuration settings for the
160 * by MSS configurator settings, and items are enabled/disabled by this method.
187 * The hardware configuration settings imported from Libero project get generated
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| /hal_microchip-latest/mpfs/platform_config_reference/mpfs_hal_config/ |
| D | mss_sw_config.h | 21 The mss_sw_config.h has the default software configuration settings for the
160 * by MSS configurator settings, and items are enabled/disabled by this method.
187 * The hardware configuration settings imported from Libero project get generated
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| /hal_microchip-latest/mpfs/drivers/mss/mss_can/ |
| D | mss_can.h | 94 is included in the project settings of the SoftConsole toolchain and that it
167 returns the message filter settings of the selected receive mailbox.
168 MSS_CAN_set_mask_n() configures the message filter settings for the
576 /* Acceptance mask settings */
589 /* Acceptance code settings */
602 /* Acceptance mask and code settings for first two data bytes */
964 For custom settings, use CAN_SPEED_MANUAL and configure the settings via
1039 Example 2: Using custom settings for bitrate, tseg1, tseg2, and sjw.
1078 when one needs to change the configuration settings while the CAN controller
1095 settings.
[all …]
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| /hal_microchip-latest/mpfs/drivers/mss/mss_ethernet_mac/ |
| D | vsc8575_phy.c | 257 /* HH: moved SerDes calibration to after the MAC PCS settings configured */ in MSS_MAC_VSC8575_phy_init()
261 … /* HH: conf_get to pre-populate all entries with valid defaults, prior to application settings */ in MSS_MAC_VSC8575_phy_init()
281 /* Example for PHY flow control settings */ in MSS_MAC_VSC8575_phy_init()
558 * Manually tweak some settings in the PHY in MSS_MAC_VSC8575_phy_init()
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| D | mss_ethernet_mac_sw_cfg.h | 39 * settings to further reduce interrupt overhead when using this option.
70 * settings to reduce interrupt overhead when using this option.
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| D | mss_ethernet_mac.h | 107 ensure that the latest PolarFire SoC HAL is included in the project settings
155 settings such as PHY address, PHY type, interface type, allowed link speeds,
617 can then overwrite some of the default settings with the ones specific to
2327 settings of the specific type filters in the Ethernet MAC. These filters allow
2414 filter settings from the Ethernet MAC. These filters allow selective reception
2441 This example reads the filter settings for filter 2 on the pMAC of GEM 0.
2911 settings for Type 2 Ethertype matching blocks in the Ethernet MAC.
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| /hal_microchip-latest/mpfs/drivers/mss/mss_usb/ |
| D | mss_usb_host_cif.c | 234 * Since the core has Multipoint option enabled, following settings need to in MSS_USBH_CIF_tx_ep_mp_configure()
284 * Since the core has Multipoint option enabled, following settings need to in MSS_USBH_CIF_rx_ep_mp_configure()
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| /hal_microchip-latest/zephyr/ |
| D | module.yml | 3 settings:
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| /hal_microchip-latest/mpfs/drivers/mss/mss_spi/ |
| D | mss_spi.h | 56 project settings of the software tool chain used to build your project and
317 This enumeration is used to define the settings for the SPI protocol mode
664 configures the MSS SPI master with the configuration settings necessary for
665 communication with the specified slave. These configuration settings must be
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| /hal_microchip-latest/mpfs/mpfs_hal/ |
| D | readme.md | 36 Software configuration settings are located in the mpfs_hal_config folder.
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| /hal_microchip-latest/mpfs/mpfs_hal/common/ |
| D | mss_pmp.c | 130 uint8_t pmp_configure(uint8_t hart_id) /* set-up with settings from Libero */ in pmp_configure()
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| D | mss_l2_cache.c | 43 * settings.
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| /hal_microchip-latest/mpfs/drivers/mss/mss_mmuart/ |
| D | mss_uart.h | 82 is included in the project settings of the SoftConsole tool chain and that it
875 number of stop bits and parity settings.
968 number of stop bits and parity settings.
1061 length, number of stop bits and parity settings.
1155 length, number of stop bits and parity settings.
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| /hal_microchip-latest/mpfs/mpfs_hal/startup_gcc/ |
| D | newlib_stubs.c | 29 * MICROCHIP_STDIO_THRU_MMUART0 to your project settings and specifying the baud
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| /hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg60/component/ |
| D | dmac.h | 72 …(0x0) /* (DMAC_BTCTRL) Step size settings apply to the dest…
73 …(0x1) /* (DMAC_BTCTRL) Step size settings apply to the sour…
74 …_STEPSEL_DST_Val << DMAC_BTCTRL_STEPSEL_Pos) /* (DMAC_BTCTRL) Step size settings apply to the dest…
75 …_STEPSEL_SRC_Val << DMAC_BTCTRL_STEPSEL_Pos) /* (DMAC_BTCTRL) Step size settings apply to the sour…
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