Searched full:selects (Results 1 – 25 of 153) sorted by relevance
1234567
| /Zephyr-Core-3.5.0/soc/arm/nxp_lpc/lpc55xxx/ |
| D | soc.h | 25 #define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
26 #define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
27 #define IOCON_PIO_FUNC2 0x02u /*!<@brief Selects pin function 2 */
28 #define IOCON_PIO_FUNC4 0x04u /*!<@brief Selects pin function 4 */
29 #define IOCON_PIO_FUNC5 0x05u /*!<@brief Selects pin function 5 */
30 #define IOCON_PIO_FUNC6 0x06u /*!<@brief Selects pin function 6 */
31 #define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
32 #define IOCON_PIO_FUNC9 0x09u /*!<@brief Selects pin function 9 */
33 #define IOCON_PIO_FUNC10 0x0Au /*!<@brief Selects pin function 10 */
34 #define IOCON_PIO_FUNC11 0x0Bu /*!<@brief Selects pin function 11 */
[all …]
|
| /Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt5xx/ |
| D | soc.h | 32 /*!<@brief Selects pin function 0 */
34 /*!<@brief Selects pin function 1 */
36 /*!<@brief Selects pin function 2 */
38 /*!<@brief Selects pin function 3 */
40 /*!<@brief Selects pin function 4 */
42 /*!<@brief Selects pin function 5 */
44 /*!<@brief Selects pin function 6 */
46 /*!<@brief Selects pin function 7 */
48 /*!<@brief Selects pin function 8 */
|
| /Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt6xx/ |
| D | soc.h | 35 /*!<@brief Selects pin function 0 */
37 /*!<@brief Selects pin function 1 */
39 /*!<@brief Selects pin function 2 */
41 /*!<@brief Selects pin function 3 */
43 /*!<@brief Selects pin function 4 */
45 /*!<@brief Selects pin function 5 */
47 /*!<@brief Selects pin function 6 */
49 /*!<@brief Selects pin function 7 */
51 /*!<@brief Selects pin function 8 */
|
| /Zephyr-Core-3.5.0/dts/bindings/display/panel/ |
| D | panel-timing.yaml | 87 0 selects active low
88 1 selects active high
98 0 selects active low
99 1 selects active high
109 0 selects active low
110 1 selects active high.
119 Polarity of pixel clock. Selects which edge to drive data to display on.
|
| /Zephyr-Core-3.5.0/dts/bindings/adc/ |
| D | telink,b91-adc.yaml | 25 This property selects the ADC source frequency: 23 kHz, 48 kHz, or 96 kHz.
34 This property selects the internal reference voltage source (in millivolts).
|
| /Zephyr-Core-3.5.0/soc/arm/nxp_kinetis/ |
| D | Kconfig | 74 Selects the amount to divide down the external reference clock for the PLL.
82 Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
91 Selects the amount to divide down the fast internal reference clock. The
99 Selects the amount to divide down the external reference clock for the
|
| /Zephyr-Core-3.5.0/include/zephyr/drivers/clock_control/ |
| D | smartbond_clock_control.h | 36 /** @brief Selects system clock
44 /** @brief Selects low power clock
|
| /Zephyr-Core-3.5.0/drivers/sensor/fxas21002/ |
| D | Kconfig | 31 Selects the full scale range
42 Selects the output data rate
|
| /Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
| D | ite,it8xxx2-pinctrl-func.yaml | 42 If KSO[17:0] is in KBS mode, setting 1 selects open-drain mode,
43 setting 0 selects push-pull mode.
|
| /Zephyr-Core-3.5.0/drivers/interrupt_controller/ |
| D | intc_gic_common_priv.h | 36 * selects redistributor SGI_base for current core for PPI and SGI
37 * selects distributor base for SPI
|
| /Zephyr-Core-3.5.0/tests/bluetooth/df/connection_cte_tx_params/ |
| D | prj.conf | 7 # Each of these roles selects BT_CONN.
|
| /Zephyr-Core-3.5.0/drivers/timer/ |
| D | Kconfig.hpet | 16 This option selects High Precision Event Timer (HPET) as a
|
| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/ |
| D | Kconfig | 38 This selects the SPI clock frequency that will be used for loading
208 Setting this field to 0 selects mode 0, CPOL=0, CPHA_MOSI=0, CPHA_MISO=0
209 Setting this filed to 7 selects mode 3, CPOL=1, CPHA_MOSI=1, CPHA_MISO=1
|
| /Zephyr-Core-3.5.0/dts/bindings/qspi/ |
| D | nxp,s32-qspi.yaml | 32 Selects the read mode:
119 Selects DQS clock source for sampling read data at side A:
153 Selects delay-chain for high frequency of operation.
201 Selects the Nth tap provided by the slave delay-chain.
|
| /Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/ |
| D | Kconfig.samd5x | 16 Selects the clock that the main clocks, such as the CPU
|
| /Zephyr-Core-3.5.0/dts/bindings/timer/ |
| D | nxp,s32-sys-timer.yaml | 24 Selects the module clock divide value for the prescaler, between 1 and 256.
|
| /Zephyr-Core-3.5.0/scripts/checkpatch/ |
| D | maintainer-checkpatch.bash | 13 # where: -n <num commits> selects the last n commits (default: 1)
14 # -c <commit> selects the "since" commit
|
| /Zephyr-Core-3.5.0/drivers/edac/ |
| D | Kconfig | 30 This option selects In-Band ECC (IBECC) IP support.
|
| /Zephyr-Core-3.5.0/boards/arm/efr32mg_sltb004a/ |
| D | efr32mg_sltb004a.dts | 126 /* This set selects for CCS811_I2C supporting CCS811 */
139 /* This set selects for ENV_I2C supporting Si7021, Si11330, BMP280 */
145 /* This set selects for HALL_I2C supporting Si7210 */
|
| /Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/ |
| D | cypress,psoc6-intmux.yaml | 15 from intmux[0~7] store a 'vector number' which selects the peripheral
23 The vector number selects the PSoC-6 peripheral interrupt source for the
|
| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | cypress,psoc6-spi.yaml | 26 MISO, MOSI, SCK, and possibly various chip selects signals. We
|
| D | intel,penwell-spi.yaml | 31 Use GSPI chip select CS0 or CS1. GSPI 0, 1 & 2 instance supports both chip selects.
|
| /Zephyr-Core-3.5.0/drivers/i2c/ |
| D | Kconfig.stm32 | 31 If I2C_TARGET is enabled it selects I2C_STM32_INTERRUPT, since target mode
|
| /Zephyr-Core-3.5.0/include/zephyr/arch/ |
| D | syscall.h | 1 /* syscall.h - automatically selects the correct syscall.h file to include */
|
| /Zephyr-Core-3.5.0/dts/bindings/ieee802154/ |
| D | atmel,rf2xx.yaml | 47 Selects Channel Page accordingly with IEEE 802.15.4 standard. The Page 0
50 (11-26: O-QPSK-250). Channel 2 is for Sub-Giga and selects
52 (JAPAN) and selects (0-3: OQPSK-RC-250) .
|
1234567
