/hal_espressif-2.7.6/docs/idf_extensions/ |
D | link_roles.py | 17 …git_root = subprocess.check_output(['git', 'rev-parse', '--show-toplevel']).strip().decode('utf-8') 23 Submodule = namedtuple('Submodule', 'url rev') 28 rev = sub_info[0].lstrip('-')[0:7] 34 submodule_dict[path] = Submodule(rel_url, rev) 59 def redirect_submodule(path, submods, rev): argument 63 … return value.url.replace('.git', ''), value.rev, re.sub('^/{}/'.format(key), '', path) 65 return IDF_REPO, rev, path 160 rev = get_github_rev() 164 app.add_role('idf', github_link('tree', rev, submods, '/', app.config)) 165 app.add_role('idf_file', github_link('blob', rev, submods, '/', app.config)) [all …]
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D | gen_version_specific_includes.py | 213 …branch = subprocess.check_output(['git', 'rev-parse', '--abbrev-ref', 'HEAD']).strip().decode('utf… 218 …return (subprocess.check_output(['git', 'rev-parse', '--short', 'HEAD']).strip().decode('utf-8'), …
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/hal_espressif-2.7.6/docs/en/api-guides/inc/ |
D | external-ram-esp32-notes.rst | 11 ESP32 rev v0 16 ESP32 rev v1 25 ESP32 rev v3 28 …ECO V3") fixes the PSRAM cache issue found in rev. 1. When :ref:`CONFIG_ESP32_REV_MIN` option is s…
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/hal_espressif-2.7.6/ |
D | .pre-commit-config.yaml | 6 rev: v3.4.0 31 rev: 3.8.4 36 rev: 5.6.4
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/hal_espressif-2.7.6/components/esp32c3/ |
D | Kconfig | 35 bool "Rev 0" 37 bool "Rev 1" 39 bool "Rev 2" 41 bool "Rev 3"
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/hal_espressif-2.7.6/components/bootloader_support/src/ |
D | bootloader_clock_init.c | 49 /* On ESP32 rev 0, switching to 80/160 MHz if clock was previously set to in bootloader_clock_configure() 51 * document). For rev. 0, switch to 240 instead if it has been enabled in bootloader_clock_configure()
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/hal_espressif-2.7.6/docs/ |
D | get_github_rev.py | 6 path = subprocess.check_output(['git', 'rev-parse', '--short', 'HEAD']).strip().decode('utf-8')
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/hal_espressif-2.7.6/tools/test_apps/security/secure_boot/ |
D | README.md | 24 …ponent Config" -> "ESP32- Specific"->"Minimum Supported ESP32 Revision" to Rev 3. Now, set Secure …
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/hal_espressif-2.7.6/components/esp32/ |
D | Kconfig | 20 bool "Rev 0" 22 bool "Rev 1" 24 bool "Rev 2" 26 bool "Rev 3"
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/hal_espressif-2.7.6/docs/en/security/ |
D | secure-boot-v2.rst | 19 …options visible in the menuconfig set :ref:`CONFIG_ESP32_REV_MIN` greater than or equal to `Rev 3`. 23 …tions visible in the menuconfig set :ref:`CONFIG_ESP32C3_REV_MIN` greater than or equal to `Rev 3`. 178 …3). To change the chip revision, set "Minimum Supported ESP32 Revision" to Rev 3 in "Component Con… 362 …eme` is `RSA`. For ESP32 ECO3 chip, select :ref:`CONFIG_ESP32_REV_MIN` to `Rev 3` to get `RSA` opt…
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/hal_espressif-2.7.6/tools/cmake/third_party/ |
D | GetGitRevisionDescription.cmake | 48 rev-parse
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/hal_espressif-2.7.6/tools/ci/config/ |
D | deploy.yml | 133 - export REV_COUNT=$(git rev-list --count HEAD)
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/hal_espressif-2.7.6/docs/test/ |
D | test_sphinx_idf_extensions.py | 112 self.assertIsNotNone(submod_dict[test_submod_name].rev)
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/hal_espressif-2.7.6/components/app_trace/sys_view/SEGGER/ |
D | SEGGER_SYSVIEW_Int.h | 61 Revision: $Rev: 5626 $
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D | SEGGER_SYSVIEW_ConfDefaults.h | 62 Revision: $Rev: 3734 $
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/hal_espressif-2.7.6/components/esptool_py/ |
D | Makefile.projbuild | 39 ESPTOOL_ELF2IMAGE_OPTIONS += --min-rev $(CONFIG_ESP32_REV_MIN)
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D | project_include.cmake | 49 list(APPEND esptool_elf2image_args --min-rev ${min_rev})
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/hal_espressif-2.7.6/components/hal/include/hal/ |
D | twai_types.h | 128 … For ESP32 Rev 2 or later, multiples of 4 from 132 to 256 are also supported */
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/hal_espressif-2.7.6/components/bt/esp_ble_mesh/mesh_common/tinycrypt/src/ |
D | ctr_prng.c | 38 * NIST SP 800-90A Rev. 1.
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/hal_espressif-2.7.6/components/app_trace/sys_view/Config/ |
D | SEGGER_SYSVIEW_Conf.h | 62 Revision: $Rev: 5927 $
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D | SEGGER_RTT_Conf.h | 63 Revision: $Rev: 5626 $
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/hal_espressif-2.7.6/components/app_trace/sys_view/Sample/Config/ |
D | SEGGER_SYSVIEW_Config_FreeRTOS.c | 62 Revision: $Rev: 3734 $
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/hal_espressif-2.7.6/components/app_trace/sys_view/Sample/OS/ |
D | SEGGER_SYSVIEW_FreeRTOS.c | 62 Revision: $Rev: 3734 $
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/hal_espressif-2.7.6/components/hal/esp32/include/hal/ |
D | twai_ll.h | 399 //ESP32 Rev 2 or later has brp div field. Need to mask it out in twai_ll_set_enabled_intrs() 419 * @note ESP32 rev 2 or later can support a x2 brp by setting a brp_div bit,
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/hal_espressif-2.7.6/components/esp_system/ |
D | sleep_modes.c | 1289 // In both rev. 0 and rev. 1 of ESP32, forcing power up of RTC_PERIPH in get_power_down_flags()
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