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/hal_espressif-2.7.6/docs/idf_extensions/
Dlink_roles.py17 …git_root = subprocess.check_output(['git', 'rev-parse', '--show-toplevel']).strip().decode('utf-8')
23 Submodule = namedtuple('Submodule', 'url rev')
28 rev = sub_info[0].lstrip('-')[0:7]
34 submodule_dict[path] = Submodule(rel_url, rev)
59 def redirect_submodule(path, submods, rev): argument
63 … return value.url.replace('.git', ''), value.rev, re.sub('^/{}/'.format(key), '', path)
65 return IDF_REPO, rev, path
160 rev = get_github_rev()
164 app.add_role('idf', github_link('tree', rev, submods, '/', app.config))
165 app.add_role('idf_file', github_link('blob', rev, submods, '/', app.config))
[all …]
Dgen_version_specific_includes.py213 …branch = subprocess.check_output(['git', 'rev-parse', '--abbrev-ref', 'HEAD']).strip().decode('utf…
218 …return (subprocess.check_output(['git', 'rev-parse', '--short', 'HEAD']).strip().decode('utf-8'), …
/hal_espressif-2.7.6/docs/en/api-guides/inc/
Dexternal-ram-esp32-notes.rst11 ESP32 rev v0
16 ESP32 rev v1
25 ESP32 rev v3
28 …ECO V3") fixes the PSRAM cache issue found in rev. 1. When :ref:`CONFIG_ESP32_REV_MIN` option is s…
/hal_espressif-2.7.6/
D.pre-commit-config.yaml6 rev: v3.4.0
31 rev: 3.8.4
36 rev: 5.6.4
/hal_espressif-2.7.6/components/esp32c3/
DKconfig35 bool "Rev 0"
37 bool "Rev 1"
39 bool "Rev 2"
41 bool "Rev 3"
/hal_espressif-2.7.6/components/bootloader_support/src/
Dbootloader_clock_init.c49 /* On ESP32 rev 0, switching to 80/160 MHz if clock was previously set to in bootloader_clock_configure()
51 * document). For rev. 0, switch to 240 instead if it has been enabled in bootloader_clock_configure()
/hal_espressif-2.7.6/docs/
Dget_github_rev.py6 path = subprocess.check_output(['git', 'rev-parse', '--short', 'HEAD']).strip().decode('utf-8')
/hal_espressif-2.7.6/tools/test_apps/security/secure_boot/
DREADME.md24 …ponent Config" -> "ESP32- Specific"->"Minimum Supported ESP32 Revision" to Rev 3. Now, set Secure …
/hal_espressif-2.7.6/components/esp32/
DKconfig20 bool "Rev 0"
22 bool "Rev 1"
24 bool "Rev 2"
26 bool "Rev 3"
/hal_espressif-2.7.6/docs/en/security/
Dsecure-boot-v2.rst19 …options visible in the menuconfig set :ref:`CONFIG_ESP32_REV_MIN` greater than or equal to `Rev 3`.
23 …tions visible in the menuconfig set :ref:`CONFIG_ESP32C3_REV_MIN` greater than or equal to `Rev 3`.
178 …3). To change the chip revision, set "Minimum Supported ESP32 Revision" to Rev 3 in "Component Con…
362 …eme` is `RSA`. For ESP32 ECO3 chip, select :ref:`CONFIG_ESP32_REV_MIN` to `Rev 3` to get `RSA` opt…
/hal_espressif-2.7.6/tools/cmake/third_party/
DGetGitRevisionDescription.cmake48 rev-parse
/hal_espressif-2.7.6/tools/ci/config/
Ddeploy.yml133 - export REV_COUNT=$(git rev-list --count HEAD)
/hal_espressif-2.7.6/docs/test/
Dtest_sphinx_idf_extensions.py112 self.assertIsNotNone(submod_dict[test_submod_name].rev)
/hal_espressif-2.7.6/components/app_trace/sys_view/SEGGER/
DSEGGER_SYSVIEW_Int.h61 Revision: $Rev: 5626 $
DSEGGER_SYSVIEW_ConfDefaults.h62 Revision: $Rev: 3734 $
/hal_espressif-2.7.6/components/esptool_py/
DMakefile.projbuild39 ESPTOOL_ELF2IMAGE_OPTIONS += --min-rev $(CONFIG_ESP32_REV_MIN)
Dproject_include.cmake49 list(APPEND esptool_elf2image_args --min-rev ${min_rev})
/hal_espressif-2.7.6/components/hal/include/hal/
Dtwai_types.h128 … For ESP32 Rev 2 or later, multiples of 4 from 132 to 256 are also supported */
/hal_espressif-2.7.6/components/bt/esp_ble_mesh/mesh_common/tinycrypt/src/
Dctr_prng.c38 * NIST SP 800-90A Rev. 1.
/hal_espressif-2.7.6/components/app_trace/sys_view/Config/
DSEGGER_SYSVIEW_Conf.h62 Revision: $Rev: 5927 $
DSEGGER_RTT_Conf.h63 Revision: $Rev: 5626 $
/hal_espressif-2.7.6/components/app_trace/sys_view/Sample/Config/
DSEGGER_SYSVIEW_Config_FreeRTOS.c62 Revision: $Rev: 3734 $
/hal_espressif-2.7.6/components/app_trace/sys_view/Sample/OS/
DSEGGER_SYSVIEW_FreeRTOS.c62 Revision: $Rev: 3734 $
/hal_espressif-2.7.6/components/hal/esp32/include/hal/
Dtwai_ll.h399 //ESP32 Rev 2 or later has brp div field. Need to mask it out in twai_ll_set_enabled_intrs()
419 * @note ESP32 rev 2 or later can support a x2 brp by setting a brp_div bit,
/hal_espressif-2.7.6/components/esp_system/
Dsleep_modes.c1289 // In both rev. 0 and rev. 1 of ESP32, forcing power up of RTC_PERIPH in get_power_down_flags()

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