| /Zephyr-Core-2.7.6/soc/sparc/leon3/ |
| D | linker.ld | 20 RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE)
25 REGION_ALIAS("REGION_TEXT", RAM);
26 REGION_ALIAS("REGION_RODATA", RAM);
27 REGION_ALIAS("REGION_DATA_VMA", RAM);
28 REGION_ALIAS("REGION_DATA_LMA", RAM);
29 REGION_ALIAS("REGION_BSS", RAM);
31 #define ROMABLE_REGION RAM
32 #define RAMABLE_REGION RAM
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| /Zephyr-Core-2.7.6/drivers/disk/ |
| D | Kconfig.ram | 5 bool "RAM Disk"
7 RAM buffer used to emulate storage disk.
14 int "RAM Disk size in kilobytes"
17 Size of the RAM Disk.
20 string "RAM Disk mount point or drive name"
21 default "RAM"
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| /Zephyr-Core-2.7.6/soc/sparc/gr716a/ |
| D | linker.ld | 18 * available on all systems. bootprom, RAM and SRAM are always available.
26 RAM (rw) : ORIGIN = 0x30000000, LENGTH = 64K
34 REGION_ALIAS("REGION_RODATA", RAM);
35 REGION_ALIAS("REGION_DATA_VMA", RAM);
36 REGION_ALIAS("REGION_DATA_LMA", RAM);
37 REGION_ALIAS("REGION_BSS", RAM);
39 #define ROMABLE_REGION RAM
40 #define RAMABLE_REGION RAM
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| /Zephyr-Core-2.7.6/dts/arm/st/h7/ |
| D | stm32h745.dtsi | 29 * The RAM memories placed here can be used by both cores M4/M7
34 /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
40 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
46 /* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
52 /* System data RAM accessible over AHB bus: SRAM3 in D2 domain */
58 /* System data RAM accessible over AHB bus: SRAM4 in D3 domain */
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| D | stm32h750.dtsi | 16 /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
22 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
28 /* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
34 /* System data RAM accessible over AHB bus: SRAM3 in D2 domain */
40 /* System data RAM accessible over AHB bus: SRAM4 in D3 domain */
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| D | stm32h743.dtsi | 28 ram-size = <4096>;
37 /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
43 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
49 /* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
55 /* System data RAM accessible over AHB bus: SRAM3 in D2 domain */
61 /* System data RAM accessible over AHB bus: SRAM4 in D3 domain */
|
| D | stm32h735.dtsi | 49 /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
55 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
61 /* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
67 /* System data RAM accessible over AHB bus: SRAM4 in D3 domain */
|
| /Zephyr-Core-2.7.6/samples/boards/nrf/system_off/src/ |
| D | retained.c | 15 /* nRF52 RAM (really, RAM AHB slaves) are partitioned as:
24 /* Inclusive address of RAM start */
27 /* Exclusive address of RAM end */
30 /* Size of a controllable RAM section in the small blocks */
33 /* Number of controllable RAM sections in each of the lower blocks */
45 /* Inclusive address of the RAM range covered by large sections */
48 /* Size of a controllable RAM section in large blocks */
51 /* Set or clear RAM retention in SYSTEM_OFF for the provided object.
80 * corresponding RAM OFF retention bit in the parent block. in ram_range_retain()
94 /* RAM[x] supports only 16 sections, each its own bit in ram_range_retain()
|
| /Zephyr-Core-2.7.6/soc/xtensa/esp32/ |
| D | Kconfig.soc | 22 hex "Bluetooth controller reserved RAM region"
36 bool "Support for external, SPI-connected RAM"
38 This enables support for an external SPI RAM chip, connected in
42 int "Minimum threshold for external RAM allocation"
49 memory will be allocated from internal RAM.
60 menu "SPI RAM config"
64 prompt "Type of SPI RAM chip in use"
89 prompt "Set RAM clock speed"
92 Select the speed for the SPI RAM chip.
93 If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
[all …]
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| /Zephyr-Core-2.7.6/include/drivers/flash/ |
| D | flash_simulator.h | 21 * @brief Obtain a pointer to the RAM buffer used but by the simulator
23 * This function allows the caller to get the address and size of the RAM buffer
27 * @param[out] mock_size size of the ram buffer.
29 * @retval pointer to the ram buffer
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| /Zephyr-Core-2.7.6/subsys/demand_paging/backing_store/ |
| D | Kconfig | 16 bool "RAM-based test backing store"
18 This implements a backing store using physical RAM pages that the
35 int "Number of pages for RAM backing store"
38 Number of pages of backing store memory to reserve in RAM. All test
|
| /Zephyr-Core-2.7.6/include/arch/x86/ |
| D | memory.ld | 12 * are in RAM.
17 * in RAM and are copied from flash at boot. Text/rodata linked in-place in
34 /* Bounds of physical RAM from DTS */
39 * the same as its physical location, although an identity mapping for RAM
51 /* "kernel RAM" for linker VMA allocations starts at the offset */
61 /* Physical RAM location where the kernel image is loaded */
81 * or copied into physical RAM by a loader (MMU)
91 RAM (wx) : ORIGIN = KERNEL_BASE_ADDR, LENGTH = KERNEL_RAM_SIZE
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| /Zephyr-Core-2.7.6/drivers/i2c/ |
| D | Kconfig.nrfx | 30 This peripheral accepts transfers from RAM only,
44 This peripheral accepts transfers from RAM only,
52 This peripheral accepts transfers from RAM only,
60 This peripheral accepts transfers from RAM only,
|
| /Zephyr-Core-2.7.6/include/arch/x86/intel64/ |
| D | linker.ld | 9 #define ROMABLE_REGION RAM
10 #define RAMABLE_REGION RAM
16 * the kernel is just one blob with the same RWX permissions on all RAM
29 * The "locore" must be in the 64K of RAM, so that 16-bit code (with
151 #include <snippets-ram-sections.ld>
183 #include <linker/common-ram.ld>
184 #include <linker/cplusplus-ram.ld>
192 /* Must be last in RAM */
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| /Zephyr-Core-2.7.6/modules/mbedtls/configs/ |
| D | config-coap.h | 27 * - optimized for low RAM usage
74 /* Save RAM at the expense of ROM */
77 /* Save some RAM by adjusting to your exact needs */
89 * save ROM and a few bytes of RAM by specifying our own ciphersuite list
94 * Allow to save RAM at the expense of interoperability: do this only if you
|
| D | config-suite-b.h | 54 * - optimized for low RAM usage
106 /* Save RAM at the expense of ROM */
109 /* Save RAM by adjusting to our exact needs */
113 /* Save RAM at the expense of speed, see ecp.h */
127 /* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */
133 * Save RAM at the expense of interoperability: do this only if you control
|
| D | config-ccm-psk-tls1_2.h | 55 * - optimized for low RAM usage
83 /* Save RAM at the expense of ROM */
86 /* Save some RAM by adjusting to your exact needs */
98 * save ROM and a few bytes of RAM by specifying our own ciphersuite list
105 * Save RAM at the expense of interoperability: do this only if you control
|
| /Zephyr-Core-2.7.6/samples/modules/canopennode/objdict/ |
| D | objdict.eds | 70 ;StorageLocation=RAM
172 ;StorageLocation=RAM
181 ;StorageLocation=RAM
187 ;StorageLocation=RAM
196 ;StorageLocation=RAM
205 ;StorageLocation=RAM
214 ;StorageLocation=RAM
223 ;StorageLocation=RAM
232 ;StorageLocation=RAM
241 ;StorageLocation=RAM
[all …]
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| /Zephyr-Core-2.7.6/dts/sparc/ |
| D | gr716a.dtsi | 10 dram: ram@30000000 {
11 /* tightly coupled data RAM */
15 iram: ram@31000000 {
16 /* tightly coupled instruction RAM */
|
| /Zephyr-Core-2.7.6/samples/subsys/usb/cdc_acm/ |
| D | overlay-composite-cdc-msc.conf | 2 # CDC ACM + Mass Storage (RAM)
9 #RAM DISK
|
| /Zephyr-Core-2.7.6/samples/subsys/usb/mass/ |
| D | Kconfig | 19 bool "Use RAM disk as block device"
23 bool "Use RAM disk and FAT file system"
53 default "RAM" if DISK_DRIVER_RAM
|
| /Zephyr-Core-2.7.6/soc/xtensa/intel_adsp/cavs_v25/ |
| D | linker.ld | 30 /* DSP RAM regions (all of them) are mapped twice on the DSP: once in
40 * section to ">ram :ram_phdr" or ">ucram :ucram_phdr" as
53 #define ucram ram
122 ram :
401 } >ram :ram_phdr
409 } >lpsram_alt_reset_vec_seg AT> ram : sram_alt_fw_reset_vec_phdr section
417 } >lpsram_alt_reset_int_vec_seg AT> ram : sram_alt_fw_reset_vec_int_phdr section
425 } >lpsram_code_seg AT> ram : lpsram_code_phdr section
461 } >ram :ram_phdr argument
468 } >ram :ram_phdr
[all …]
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| /Zephyr-Core-2.7.6/include/arch/nios2/ |
| D | linker.ld | 32 * _RAM_ADDR Beginning of RAM
33 * _RAM_SIZE Size of RAM in bytes
37 * 1. Non-XIP systems where the reset vector is at the beginning of RAM
40 * the exception vector is in RAM
169 /* Altera strongly recommends keeping exception entry code in RAM
190 #include <linker/common-ram.ld>
226 #include <snippets-ram-sections.ld>
233 #include <linker/cplusplus-ram.ld>
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| /Zephyr-Core-2.7.6/drivers/bbram/ |
| D | Kconfig | 5 bool "Battery-backed RAM drivers"
7 Enable BBRAM (battery-backed RAM) driver configuration.
|
| /Zephyr-Core-2.7.6/drivers/clock_control/ |
| D | Kconfig.lpc11u6x | 21 bool "Enable USB RAM"
23 Enable USB RAM
|
