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/Zephyr-latest/dts/bindings/pinctrl/
Dnuvoton,npcx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
20 An example for NPCX7 family, include the chip level pinctrl DTSI file in the
23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
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/Zephyr-latest/soc/nuvoton/npcx/common/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
15 * @brief Pinctrl node types in NPCX series
25 * @brief Suppoerted peripheral device configuration type in NPCX series
34 * @brief Suppoerted IO bias type in NPCX series
43 * @brief Suppoerted IO drive type in NPCX series
51 * @brief Suppoerted PSL input detection mode in NPCX series
59 * @brief Suppoerted PSL input detection polarity in NPCX series
70 * pin-muxing, pull-up/down and so on.
89 * characteristics such as tri-state, power supply type selection, and so on.
103 * @brief NPCX Power Switch Logic (PSL) input pad configuration structure
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/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
28 More detailed information can be found in:
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
38 Changes in this release
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
62 * :zephyr_file:`include/zephyr/zephyr.h` has been deprecated in favor of
76 to :c:struct:`socketcan_filter`. The SocketCAN utility functions are now available in
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/Zephyr-latest/soc/nuvoton/npcx/common/reg/
Dreg_def.h4 * SPDX-License-Identifier: Apache-2.0
20 * must meet the alignment requirement of cortex-m4.
26 "Failed in size check of register structure!")
29 "Failed in offset check of register structure member!")
37 * For example, add this macro for word register 'PRSC' of PWM module in its
44 __ASSERT(reg == val, "16-bit reg access failed!"); \
50 __ASSERT(reg == val, "32-bit reg access failed!"); \
90 /* 0x102: High-Frequency Reference Divisor I */
92 /* 0x104: High-Frequency Reference Divisor F */
120 /* 0x003: Enable in Sleep Control */
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