Searched full:ps2 (Results 1 – 25 of 48) sorted by relevance
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| /Zephyr-Core-3.5.0/drivers/ps2/ |
| D | Kconfig | 6 menuconfig PS2 config
11 if PS2
13 source "drivers/ps2/Kconfig.xec"
14 source "drivers/ps2/Kconfig.npcx"
16 module = PS2
17 module-str = ps2
28 endif # PS2
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| D | Kconfig.xec | 1 # Microchip XEC PS2 configuration options
7 bool "XEC Microchip PS2 driver"
11 Enable the Microchip XEC PS2 IO driver. The driver also
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| D | Kconfig.npcx | 1 # NPCX PS2 configuration options
7 bool "Nuvoton NPCX embedded controller (EC) PS2 driver"
11 Enable the NPCX family PS2 driver. It provides four PS/2 channels.
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| D | ps2_mchp_xec.c | 23 #include <zephyr/drivers/ps2.h>
124 /* In case the self test for a PS2 device already finished and in ps2_xec_configure()
160 /* Allow the PS2 controller to complete a RX transaction. This in ps2_xec_write()
163 * transaction to complete. The PS2 block has a single in ps2_xec_write()
174 LOG_DBG("PS2 write timed out"); in ps2_xec_write()
180 /* Inhibit ps2 controller and clear status register */ in ps2_xec_write()
243 /* Disable PS2 wake interrupt in ps2_xec_pm_action()
251 LOG_ERR("Fail to disable PS2 wake interrupt (ret %d)", ret); in ps2_xec_pm_action()
264 /* Enable PS2 wake interrupt in ps2_xec_pm_action()
274 LOG_ERR("Fail to enable PS2 wake interrupt(ret %d)", ret); in ps2_xec_pm_action()
[all …]
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| D | CMakeLists.txt | 3 zephyr_syscall_header(${ZEPHYR_BASE}/include/zephyr/drivers/ps2.h)
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| D | ps2_npcx_channel.c | 21 #include <zephyr/drivers/ps2.h>
92 LOG_ERR("PS2 pinctrl setup failed (%d)", ret); in ps2_npcx_channel_init()
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| /Zephyr-Core-3.5.0/samples/drivers/ps2/ |
| D | sample.yaml | 2 name: PS2 driver sample
4 sample.drivers.espi.ps2:
7 - ps2
17 filter: dt_compat_enabled("microchip,xec-ps2")
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| D | README.rst | 1 .. zephyr:code-sample:: ps2
11 Callbacks are registered that will write to the console indicating PS2 events.
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| /Zephyr-Core-3.5.0/dts/bindings/ps2/ |
| D | microchip,xec-ps2.yaml | 6 compatible: "microchip,xec-ps2"
8 include: [ps2.yaml, pinctrl-device.yaml]
27 description: PS2 PCR register index and bit position
31 description: GPIO configured as PS2 DAT wake source
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| D | nuvoton,npcx-ps2-ctrl.yaml | 6 compatible: "nuvoton,npcx-ps2-ctrl"
10 bus: ps2
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| D | ps2.yaml | 8 bus: ps2
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| D | nuvoton,npcx-ps2-channel.yaml | 6 compatible: "nuvoton,npcx-ps2-channel"
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/common/reg/ |
| D | mec_ps2.h | 14 * PS2 TRX Buffer register
20 /* PS2 Control register */
28 /* Enable PS2 state machine */
50 /* PS2 Status register */
79 /* PS2 Protocol bit positions */
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | ps2.h | 44 * PS2 driver API definition and system call entry points
67 * @brief Configure a ps2 instance.
92 * @param value Data for the PS2 device.
175 #include <syscalls/ps2.h>
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| /Zephyr-Core-3.5.0/samples/drivers/ps2/boards/ |
| D | mec172xmodular_assy6930.overlay | 9 ps2-port0 = &ps2_0;
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| D | mec172xevb_assy6906.overlay | 14 ps2-port0 = &ps2_0;
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| D | npcx7m6fb_evb.overlay | 9 ps2-port0 = &ps2_channel0;
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| D | npcx9m6f_evb.overlay | 9 ps2-port0 = &ps2_channel0;
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| D | mec15xxevb_assy6853.overlay | 19 ps2-port0 = &ps2_0;
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| D | mec1501modular_assy6885.overlay | 19 ps2-port0 = &ps2_0;
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/ |
| D | Kconfig.defconfig.mec1501hsz | 20 depends on PS2
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| /Zephyr-Core-3.5.0/dts/bindings/mtd/ |
| D | microchip,xec-eeprom.yaml | 24 description: PS2 PCR register index and bit position
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/ |
| D | Kconfig.defconfig.series | 34 depends on PS2
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| /Zephyr-Core-3.5.0/doc/hardware/peripherals/ |
| D | index.rst | 45 ps2.rst
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| /Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/ |
| D | npcx.dtsi | 500 ps2_ctrl0: ps2@400b1000 {
501 compatible = "nuvoton,npcx-ps2-ctrl";
506 /* PS2 Channels - Please use them as PS2 node */
508 compatible = "nuvoton,npcx-ps2-channel";
514 compatible = "nuvoton,npcx-ps2-channel";
520 compatible = "nuvoton,npcx-ps2-channel";
526 compatible = "nuvoton,npcx-ps2-channel";
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