Searched full:pc18 (Results 1 – 25 of 71) sorted by relevance
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97 #define PIN_PC18 ( 82) /**< Pin Number for PC18 */214 #define PIO_PC18 (_U_(1) << 18) /**< PIO Mask for PC18 */331 #define PIO_PC18_IDX ( 82) /**< PIO Index Number for PC18 */892 #define PIN_PC18B_PWM0_PWML1 _L_(82) /**< PWM0 signal: PWML1 on PC18 mux…1055 #define PIN_PC18A_SDRAMC_A0 _L_(82) /**< SDRAMC signal: A0 on PC18 mux …1059 #define PIN_PC18A_SDRAMC_NBS0 _L_(82) /**< SDRAMC signal: NBS0 on PC18 mu…1328 #define PIN_PC18A_SMC_A0 _L_(82) /**< SMC signal: A0 on PC18 mux A*/1332 #define PIN_PC18A_SMC_NBS0 _L_(82) /**< SMC signal: NBS0 on PC18 mux A…2059 #define PIN_PC18A_EBI_A0 _L_(82) /**< EBI signal: A0 on PC18 mux A*/2063 #define PIN_PC18A_EBI_NBS0 _L_(82) /**< EBI signal: NBS0 on PC18 mux A…
97 #define PIN_PC18 ( 82) /**< Pin Number for PC18 */214 #define PIO_PC18 (_U_(1) << 18) /**< PIO Mask for PC18 */331 #define PIO_PC18_IDX ( 82) /**< PIO Index Number for PC18 */879 #define PIN_PC18B_PWM0_PWML1 _L_(82) /**< PWM0 signal: PWML1 on PC18 mux…1042 #define PIN_PC18A_SDRAMC_A0 _L_(82) /**< SDRAMC signal: A0 on PC18 mux …1046 #define PIN_PC18A_SDRAMC_NBS0 _L_(82) /**< SDRAMC signal: NBS0 on PC18 mu…1315 #define PIN_PC18A_SMC_A0 _L_(82) /**< SMC signal: A0 on PC18 mux A*/1319 #define PIN_PC18A_SMC_NBS0 _L_(82) /**< SMC signal: NBS0 on PC18 mux A…2046 #define PIN_PC18A_EBI_A0 _L_(82) /**< EBI signal: A0 on PC18 mux A*/2050 #define PIN_PC18A_EBI_NBS0 _L_(82) /**< EBI signal: NBS0 on PC18 mux A…
308 pc18:
6 `PWMH0` signal can be mapped to `PA0`, `PA11`, `PA23`, `PB0`, `PC18` or `PD20`
329 pc18:
97 #define PIN_PC18 ( 82) /**< Pin Number for PC18 */214 #define PIO_PC18 (_U_(1) << 18) /**< PIO Mask for PC18 */331 #define PIO_PC18_IDX ( 82) /**< PIO Index Number for PC18 */475 #define PIN_PC18A_EBI_A0 _L_(82) /**< EBI signal: A0 on PC18 mux A*/679 #define PIN_PC18A_EBI_NBS0 _L_(82) /**< EBI signal: NBS0 on PC18 mux A…799 #define PIN_PC18A_EBI_DQM0 _L_(82) /**< EBI signal: DQM0 on PC18 mux A…1248 #define PIN_PC18B_PWM0_PWML1 _L_(82) /**< PWM0 signal: PWML1 on PC18 mux…
97 #define PIN_PC18 ( 82) /**< Pin Number for PC18 */214 #define PIO_PC18 (_U_(1) << 18) /**< PIO Mask for PC18 */331 #define PIO_PC18_IDX ( 82) /**< PIO Index Number for PC18 */475 #define PIN_PC18A_EBI_A0 _L_(82) /**< EBI signal: A0 on PC18 mux A*/679 #define PIN_PC18A_EBI_NBS0 _L_(82) /**< EBI signal: NBS0 on PC18 mux A…799 #define PIN_PC18A_EBI_DQM0 _L_(82) /**< EBI signal: DQM0 on PC18 mux A…1261 #define PIN_PC18B_PWM0_PWML1 _L_(82) /**< PWM0 signal: PWML1 on PC18 mux…
154 #define PIN_PC18 82 /**< \brief Pin Number for PC18 */155 #define GPIO_PC18 _UL_(1 << 18) /**< \brief GPIO Mask for PC18 */470 #define PIN_PC18A_TC1_B1 _L_(82) /**< \brief TC1 signal: B1 on PC18 mux A */922 #define PIN_PC18D_GLOC_IN7 _L_(82) /**< \brief GLOC signal: IN7 on PC18 mux D */1281 #define PIN_PC18G_CATB_SENSE19 _L_(82) /**< \brief CATB signal: SENSE19 on PC18 mux G */1410 #define PIN_PC18F_LCDCA_SEG3 _L_(82) /**< \brief LCDCA signal: SEG3 on PC18 mux F */
90 #define PIN_PC18 82 /**< \brief Pin Number for PC18 */91 #define PORT_PC18 (_UL_(1) << 18) /**< \brief PORT Mask for PC18 */453 #define PIN_PC18F_SERCOM4_PAD3 _L_(82) /**< \brief SERCOM4 signal: PAD3 on PC18 mux F */
177 #define PIN_PC18 82 /**< \brief Pin Number for PC18 */178 #define PORT_PC18 (_UL_(1) << 18) /**< \brief PORT Mask for PC18 */416 #define PIN_PC18A_EIC_EXTINT2 _L_(82) /**< \brief EIC signal: EXTINT2 on PC18 mux A */772 #define PIN_PC18D_SERCOM0_PAD2 _L_(82) /**< \brief SERCOM0 signal: PAD2 on PC18 mux D */1063 #define PIN_PC18F_TCC0_WO2 _L_(82) /**< \brief TCC0 signal: WO2 on PC18 mux F */1389 #define PIN_PC18L_GMAC_GRXCK _L_(82) /**< \brief GMAC signal: GRXCK on PC18 mux L */1562 #define PIN_PC18G_PDEC_QDI2 _L_(82) /**< \brief PDEC signal: QDI2 on PC18 mux G */1940 #define PIN_PC18C_SERCOM6_PAD2 _L_(82) /**< \brief SERCOM6 signal: PAD2 on PC18 mux C */
177 #define PIN_PC18 82 /**< \brief Pin Number for PC18 */178 #define PORT_PC18 (_UL_(1) << 18) /**< \brief PORT Mask for PC18 */416 #define PIN_PC18A_EIC_EXTINT2 _L_(82) /**< \brief EIC signal: EXTINT2 on PC18 mux A */772 #define PIN_PC18D_SERCOM0_PAD2 _L_(82) /**< \brief SERCOM0 signal: PAD2 on PC18 mux D */1063 #define PIN_PC18F_TCC0_WO2 _L_(82) /**< \brief TCC0 signal: WO2 on PC18 mux F */1355 #define PIN_PC18L_GMAC_GRXCK _L_(82) /**< \brief GMAC signal: GRXCK on PC18 mux L */1528 #define PIN_PC18G_PDEC_QDI2 _L_(82) /**< \brief PDEC signal: QDI2 on PC18 mux G */1906 #define PIN_PC18C_SERCOM6_PAD2 _L_(82) /**< \brief SERCOM6 signal: PAD2 on PC18 mux C */
