Searched full:pc16 (Results 1 – 25 of 64) sorted by relevance
123
116 pc16:165 At below `yaml` snip code defines `pc16` pin:168 pc16:189 In this case, besides `n` and `p` packages tells to engine that pin `pc16` must
303 pc16:
95 #define PIN_PC16 ( 80) /**< Pin Number for PC16 */212 #define PIO_PC16 (_U_(1) << 16) /**< PIO Mask for PC16 */329 #define PIO_PC16_IDX ( 80) /**< PIO Index Number for PC16 */1151 #define PIN_PC16A_SDRAMC_A21 _L_(80) /**< SDRAMC signal: A21 on PC16 mux…1155 #define PIN_PC16A_SDRAMC_NANDALE _L_(80) /**< SDRAMC signal: NANDALE on PC16…1424 #define PIN_PC16A_SMC_A21 _L_(80) /**< SMC signal: A21 on PC16 mux A*/1428 #define PIN_PC16A_SMC_NANDALE _L_(80) /**< SMC signal: NANDALE on PC16 mu…2155 #define PIN_PC16A_EBI_A21 _L_(80) /**< EBI signal: A21 on PC16 mux A*/2159 #define PIN_PC16A_EBI_NANDALE _L_(80) /**< EBI signal: NANDALE on PC16 mu…
95 #define PIN_PC16 ( 80) /**< Pin Number for PC16 */212 #define PIO_PC16 (_U_(1) << 16) /**< PIO Mask for PC16 */329 #define PIO_PC16_IDX ( 80) /**< PIO Index Number for PC16 */1138 #define PIN_PC16A_SDRAMC_A21 _L_(80) /**< SDRAMC signal: A21 on PC16 mux…1142 #define PIN_PC16A_SDRAMC_NANDALE _L_(80) /**< SDRAMC signal: NANDALE on PC16…1411 #define PIN_PC16A_SMC_A21 _L_(80) /**< SMC signal: A21 on PC16 mux A*/1415 #define PIN_PC16A_SMC_NANDALE _L_(80) /**< SMC signal: NANDALE on PC16 mu…2142 #define PIN_PC16A_EBI_A21 _L_(80) /**< EBI signal: A21 on PC16 mux A*/2146 #define PIN_PC16A_EBI_NANDALE _L_(80) /**< EBI signal: NANDALE on PC16 mu…
150 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */151 #define GPIO_PC16 _UL_(1 << 16) /**< \brief GPIO Mask for PC16 */462 #define PIN_PC16A_TC1_B0 _L_(80) /**< \brief TC1 signal: B0 on PC16 mux A */898 #define PIN_PC16D_GLOC_IN5 _L_(80) /**< \brief GLOC signal: IN5 on PC16 mux D */1265 #define PIN_PC16G_CATB_SENSE17 _L_(80) /**< \brief CATB signal: SENSE17 on PC16 mux G */1402 #define PIN_PC16F_LCDCA_SEG1 _L_(80) /**< \brief LCDCA signal: SEG1 on PC16 mux F */
160 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */161 #define GPIO_PC16 _UL_(1 << 16) /**< \brief GPIO Mask for PC16 */512 #define PIN_PC16A_TC1_B0 _L_(80) /**< \brief TC1 signal: B0 on PC16 mux A */976 #define PIN_PC16D_GLOC_IN5 _L_(80) /**< \brief GLOC signal: IN5 on PC16 mux D */1395 #define PIN_PC16G_CATB_SENSE17 _L_(80) /**< \brief CATB signal: SENSE17 on PC16 mux G */
88 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */89 #define PORT_PC16 (_UL_(1) << 16) /**< \brief PORT Mask for PC16 */123 #define PIN_PC16F_GCLK_IO1 _L_(80) /**< \brief GCLK signal: IO1 on PC16 mux F */
173 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */174 #define PORT_PC16 (_UL_(1) << 16) /**< \brief PORT Mask for PC16 */356 #define PIN_PC16A_EIC_EXTINT0 _L_(80) /**< \brief EIC signal: EXTINT0 on PC16 mux A */756 #define PIN_PC16D_SERCOM0_PAD1 _L_(80) /**< \brief SERCOM0 signal: PAD1 on PC16 mux D */1023 #define PIN_PC16F_TCC0_WO0 _L_(80) /**< \brief TCC0 signal: WO0 on PC16 mux F */1409 #define PIN_PC16L_GMAC_GTX2 _L_(80) /**< \brief GMAC signal: GTX2 on PC16 mux L */1530 #define PIN_PC16G_PDEC_QDI0 _L_(80) /**< \brief PDEC signal: QDI0 on PC16 mux G */1912 #define PIN_PC16C_SERCOM6_PAD0 _L_(80) /**< \brief SERCOM6 signal: PAD0 on PC16 mux C */
173 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */174 #define PORT_PC16 (_UL_(1) << 16) /**< \brief PORT Mask for PC16 */356 #define PIN_PC16A_EIC_EXTINT0 _L_(80) /**< \brief EIC signal: EXTINT0 on PC16 mux A */756 #define PIN_PC16D_SERCOM0_PAD1 _L_(80) /**< \brief SERCOM0 signal: PAD1 on PC16 mux D */1023 #define PIN_PC16F_TCC0_WO0 _L_(80) /**< \brief TCC0 signal: WO0 on PC16 mux F */1375 #define PIN_PC16L_GMAC_GTX2 _L_(80) /**< \brief GMAC signal: GTX2 on PC16 mux L */1496 #define PIN_PC16G_PDEC_QDI0 _L_(80) /**< \brief PDEC signal: QDI0 on PC16 mux G */1878 #define PIN_PC16C_SERCOM6_PAD0 _L_(80) /**< \brief SERCOM6 signal: PAD0 on PC16 mux C */
173 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */174 #define PORT_PC16 (_UL_(1) << 16) /**< \brief PORT Mask for PC16 */356 #define PIN_PC16A_EIC_EXTINT0 _L_(80) /**< \brief EIC signal: EXTINT0 on PC16 mux A */756 #define PIN_PC16D_SERCOM0_PAD1 _L_(80) /**< \brief SERCOM0 signal: PAD1 on PC16 mux D */1023 #define PIN_PC16F_TCC0_WO0 _L_(80) /**< \brief TCC0 signal: WO0 on PC16 mux F */1407 #define PIN_PC16G_PDEC_QDI0 _L_(80) /**< \brief PDEC signal: QDI0 on PC16 mux G */1789 #define PIN_PC16C_SERCOM6_PAD0 _L_(80) /**< \brief SERCOM6 signal: PAD0 on PC16 mux C */
173 #define PIN_PC16 80 /**< \brief Pin Number for PC16 */174 #define PORT_PC16 (_UL_(1) << 16) /**< \brief PORT Mask for PC16 */356 #define PIN_PC16A_EIC_EXTINT0 _L_(80) /**< \brief EIC signal: EXTINT0 on PC16 mux A */756 #define PIN_PC16D_SERCOM0_PAD1 _L_(80) /**< \brief SERCOM0 signal: PAD1 on PC16 mux D */1023 #define PIN_PC16F_TCC0_WO0 _L_(80) /**< \brief TCC0 signal: WO0 on PC16 mux F */1441 #define PIN_PC16G_PDEC_QDI0 _L_(80) /**< \brief PDEC signal: QDI0 on PC16 mux G */1823 #define PIN_PC16C_SERCOM6_PAD0 _L_(80) /**< \brief SERCOM6 signal: PAD0 on PC16 mux C */