Searched full:pb3 (Results 1 – 25 of 65) sorted by relevance
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70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…437 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/490 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…531 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/931 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…462 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/515 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…565 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/1057 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…451 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/504 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…558 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/958 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…462 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/515 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…569 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/969 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…462 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/515 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…578 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/1070 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */284 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…287 #define PIN_PB3X1_AFEC0_WKUP12 _L_(35) /**< AFEC0 signal: WKUP12 on PB3 mu…451 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/504 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…567 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/1059 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */281 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…423 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/476 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…517 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/874 #define PIN_PB3X1_SUPC_WKUP12 _L_(35) /**< SUPC signal: WKUP12 on PB3 mux…1007 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */281 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…469 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/522 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…572 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/962 #define PIN_PB3X1_SUPC_WKUP12 _L_(35) /**< SUPC signal: WKUP12 on PB3 mux…1130 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */187 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */304 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */395 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…976 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/1029 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…1083 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/1558 #define PIN_PB3X1_SUPC_WKUP12 _L_(35) /**< SUPC signal: WKUP12 on PB3 mux…1824 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */281 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…423 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/476 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…530 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/887 #define PIN_PB3X1_SUPC_WKUP12 _L_(35) /**< SUPC signal: WKUP12 on PB3 mux…1020 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
70 #define PIN_PB3 ( 35) /**< Pin Number for PB3 */149 #define PIO_PB3 (_U_(1) << 3) /**< PIO Mask for PB3 */228 #define PIO_PB3_IDX ( 35) /**< PIO Index Number for PB3 */281 #define PIN_PB3X1_AFEC0_AD2 _L_(35) /**< AFEC0 signal: AD2 on PB3 mux X…469 #define PIN_PB3D_ISI_D2 _L_(35) /**< ISI signal: D2 on PB3 mux D*/522 #define PIN_PB3A_MCAN0_CANRX0 _L_(35) /**< MCAN0 signal: CANRX0 on PB3 mu…585 #define PIN_PB3B_PMC_PCK2 _L_(35) /**< PMC signal: PCK2 on PB3 mux B*/975 #define PIN_PB3X1_SUPC_WKUP12 _L_(35) /**< SUPC signal: WKUP12 on PB3 mux…1143 #define PIN_PB3C_USART0_RTS0 _L_(35) /**< USART0 signal: RTS0 on PB3 mux…
