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/hal_atmel-3.6.0/asf/sam/include/sam4l/pio/
Dsam4lc2b.h106 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
107 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
265 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
453 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
573 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
808 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
861 #define PIN_PB10F_LCDCA_SEG16 _L_(42) /**< \brief LCDCA signal: SEG16 on PB10 mux F */
963 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
972 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
Dsam4lc4b.h106 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
107 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
265 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
453 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
573 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
808 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
861 #define PIN_PB10F_LCDCA_SEG16 _L_(42) /**< \brief LCDCA signal: SEG16 on PB10 mux F */
963 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
972 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
Dsam4lc8b.h106 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
107 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
265 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
453 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
573 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
808 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
861 #define PIN_PB10F_LCDCA_SEG16 _L_(42) /**< \brief LCDCA signal: SEG16 on PB10 mux F */
963 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
972 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
Dsam4ls2b.h116 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
117 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
315 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
523 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
663 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
938 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
984 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
993 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
Dsam4ls4b.h116 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
117 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
315 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
523 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
663 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
938 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
984 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
993 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
Dsam4ls8b.h116 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
117 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */
315 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */
523 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */
663 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */
938 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */
984 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */
993 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */
/hal_atmel-3.6.0/asf/sam0/include/samd21/pio/
Dsamd21g15a.h100 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
101 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
153 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
308 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
541 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
635 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
780 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
908 #define PIN_PB10G_I2S_MCK1 _L_(42) /**< \brief I2S signal: MCK1 on PB10 mux G */
Dsamd21g16a.h100 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
101 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
153 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
308 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
541 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
635 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
780 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
908 #define PIN_PB10G_I2S_MCK1 _L_(42) /**< \brief I2S signal: MCK1 on PB10 mux G */
Dsamd21g17a.h100 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
101 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
153 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
308 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
541 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
635 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
780 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
908 #define PIN_PB10G_I2S_MCK1 _L_(42) /**< \brief I2S signal: MCK1 on PB10 mux G */
Dsamd21g18a.h100 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
101 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
153 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
308 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
541 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
635 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
780 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
908 #define PIN_PB10G_I2S_MCK1 _L_(42) /**< \brief I2S signal: MCK1 on PB10 mux G */
/hal_atmel-3.6.0/asf/sam0/include/samd51/pio/
Dsamd51g18a.h99 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
100 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
162 #define PIN_PB10M_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux M */
305 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
595 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
624 #define PIN_PB10G_TCC1_WO0 _L_(42) /**< \brief TCC1 signal: WO0 on PB10 mux G */
834 #define PIN_PB10H_QSPI_SCK _L_(42) /**< \brief QSPI signal: SCK on PB10 mux H */
899 #define PIN_PB10N_CCL_IN11 _L_(42) /**< \brief CCL signal: IN11 on PB10 mux N */
960 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
1346 #define PIN_PB10I_SDHC0_SDDAT3 _L_(42) /**< \brief SDHC0 signal: SDDAT3 on PB10 mux I */
Dsamd51g19a.h99 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
100 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
162 #define PIN_PB10M_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux M */
305 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
595 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
624 #define PIN_PB10G_TCC1_WO0 _L_(42) /**< \brief TCC1 signal: WO0 on PB10 mux G */
834 #define PIN_PB10H_QSPI_SCK _L_(42) /**< \brief QSPI signal: SCK on PB10 mux H */
899 #define PIN_PB10N_CCL_IN11 _L_(42) /**< \brief CCL signal: IN11 on PB10 mux N */
960 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
1346 #define PIN_PB10I_SDHC0_SDDAT3 _L_(42) /**< \brief SDHC0 signal: SDDAT3 on PB10 mux I */
Dsamd51j18a.h111 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
112 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
210 #define PIN_PB10M_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux M */
401 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
749 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
790 #define PIN_PB10G_TCC1_WO0 _L_(42) /**< \brief TCC1 signal: WO0 on PB10 mux G */
976 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
1067 #define PIN_PB10H_QSPI_SCK _L_(42) /**< \brief QSPI signal: SCK on PB10 mux H */
1156 #define PIN_PB10N_CCL_IN11 _L_(42) /**< \brief CCL signal: IN11 on PB10 mux N */
1233 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
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Dsamd51j19a.h111 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
112 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
210 #define PIN_PB10M_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux M */
401 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
749 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
790 #define PIN_PB10G_TCC1_WO0 _L_(42) /**< \brief TCC1 signal: WO0 on PB10 mux G */
976 #define PIN_PB10E_TC5_WO0 _L_(42) /**< \brief TC5 signal: WO0 on PB10 mux E */
1067 #define PIN_PB10H_QSPI_SCK _L_(42) /**< \brief QSPI signal: SCK on PB10 mux H */
1156 #define PIN_PB10N_CCL_IN11 _L_(42) /**< \brief CCL signal: IN11 on PB10 mux N */
1233 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
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/hal_atmel-3.6.0/asf/sam0/include/samc21/pio/
Dsamc21g15a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
594 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
669 #define PIN_PB10G_CAN1_TX _L_(42) /**< \brief CAN1 signal: TX on PB10 mux G */
710 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
842 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc21g16a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
594 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
669 #define PIN_PB10G_CAN1_TX _L_(42) /**< \brief CAN1 signal: TX on PB10 mux G */
710 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
842 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc21g17a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
594 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
669 #define PIN_PB10G_CAN1_TX _L_(42) /**< \brief CAN1 signal: TX on PB10 mux G */
710 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
842 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc21g18a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
594 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
669 #define PIN_PB10G_CAN1_TX _L_(42) /**< \brief CAN1 signal: TX on PB10 mux G */
710 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
842 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
/hal_atmel-3.6.0/asf/sam0/include/saml21/pio/
Dsaml21g16b.h99 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
100 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
190 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
340 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
573 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
622 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
754 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsaml21g17b.h99 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
100 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
190 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
340 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
573 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
622 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
754 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsaml21g18b.h99 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
100 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
190 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
340 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
573 #define PIN_PB10D_SERCOM4_PAD2 _L_(42) /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */
622 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
754 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
/hal_atmel-3.6.0/asf/sam0/include/samc20/pio/
Dsamc20g16a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
610 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
742 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc20g17a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
610 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
742 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc20g18a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
610 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
742 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */
Dsamc20g15a.h101 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */
102 #define PORT_PB10 (_UL_(1) << 10) /**< \brief PORT Mask for PB10 */
219 #define PIN_PB10H_GCLK_IO4 _L_(42) /**< \brief GCLK signal: IO4 on PB10 mux H */
374 #define PIN_PB10A_EIC_EXTINT10 _L_(42) /**< \brief EIC signal: EXTINT10 on PB10 mux A */
610 #define PIN_PB10F_TCC0_WO4 _L_(42) /**< \brief TCC0 signal: WO4 on PB10 mux F */
742 #define PIN_PB10E_TC1_WO0 _L_(42) /**< \brief TC1 signal: WO0 on PB10 mux E */
952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */

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