Searched full:pa10 (Results 1 – 25 of 86) sorted by relevance
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| /Zephyr-latest/tests/drivers/i2c/i2c_target_api/boards/ |
| D | stm32f3_disco.overlay | 8 * i2c2 PA10 P2:43 PA9 P2:44
10 * Short Pin PB7 to PA10, and PB6 to PA9, for the test to pass.
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| D | stm32u083c_dk.overlay | 10 * i2c1 PA10 CN10:2 PA9 CN7:23
13 * Short Pin PA10 to PA6, and PA9 to PA7, for the test to pass.
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | gd,gd32-pinctrl-af.yaml | 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
37 /* configure PA10 as USART0 RX and PA12 as USART0 RTS */
39 /* both PA10 and PA12 have pull-up enabled */
47 /* configure PA9, PA10, PA11 and PA12 in analog mode */
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| D | gd,gd32-pinctrl-afio.yaml | 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
37 /* configure PA10 as USART0 RX and PA12 as USART0 RTS (no remap) */
39 /* both PA10 and PA12 have pull-up enabled */
47 /* configure PA9, PA10, PA11 and PA12 in analog mode */
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| D | st,stm32-pinctrl.yaml | 28 description: Remaps the PA12 pin to operate as PA10 pin.
33 description: Remaps the PA11/PA12 pin to operate as PA9/PA10 pin.
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| D | atmel,sam-pinctrl.yaml | 11 to route USART0 RX to pin PA10 and enable the pull-up resistor on the pin.
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| /Zephyr-latest/tests/drivers/uart/uart_async_api/boards/ |
| D | nucleo_f103rb.overlay | 3 /* Connect pin (PA10) D2 of the CN9:2 to D8 (PA9) of the CN5:1 */
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| /Zephyr-latest/boards/weact/stm32g431_core/doc/ |
| D | index.rst | 12 PB4 respectively. Dead battery support requires PA9 and PA10 to be routed to CC1 and
19 After these modifications have been made, PA9, PA10, PB2, PB4, and PB6 should be
41 - UCPD1 DBCCx : PA9/PA10 (not connected by default)
60 | SB3/SB5 | Open | Connect PA9/PA10 (UCPD1_DBCCx) to PB6/PB4 |
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| /Zephyr-latest/boards/google/dragonclaw/doc/ |
| D | index.rst | 21 - USART_1 TX/RX : PA9/PA10
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| /Zephyr-latest/boards/google/icetower/doc/ |
| D | index.rst | 22 - USART_1 TX/RX : PA9/PA10
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| /Zephyr-latest/boards/seco/stm32f3_seco_d23/doc/ |
| D | index.rst | 69 - UART_1_RX : PA10 (debug config for UART_1)
87 - I2C2_SDA : PA10 (alternate config for UART_1)
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| /Zephyr-latest/boards/others/black_f407ve/doc/ |
| D | index.rst | 114 - UART_1_RX : PA10
150 it to UART1 pins (PA9/PA10).
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| /Zephyr-latest/boards/sipeed/longan_nano/doc/ |
| D | index.rst | 46 Connect to TX0 (PA9) and RX0 (PA10).
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| /Zephyr-latest/boards/ronoth/lodev/doc/ |
| D | index.rst | 43 PA9 and PA10 are unavailable for I/Os.
80 19 PA10 USB serial Rx is driven by this pin (output) for UART1
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| /Zephyr-latest/boards/gd/gd32vf103c_starter/doc/ |
| D | index.rst | 39 TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/others/stm32f030_demo/doc/ |
| D | index.rst | 42 - UART_1 TX/RX : PA9/PA10
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| /Zephyr-latest/boards/gd/gd32f350r_eval/doc/ |
| D | index.rst | 44 is USART0 with TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/gd/gd32f450i_eval/doc/ |
| D | index.rst | 52 is USART0 with TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/gd/gd32f450z_eval/doc/ |
| D | index.rst | 50 is USART0 with TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/gd/gd32f470i_eval/doc/ |
| D | index.rst | 51 is USART0 with TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/gd/gd32vf103v_eval/doc/ |
| D | index.rst | 46 is USART0 with TX connected at PA9 and RX at PA10.
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| /Zephyr-latest/boards/gd/gd32e507z_eval/doc/ |
| D | index.rst | 49 is USART0 with TX connected at PA9 and RX at PA10. USART0 is exposed as a
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| /Zephyr-latest/boards/vcc-gnd/yd_stm32h750vb/doc/ |
| D | index.rst | 28 - UART_1_RX : PA10
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| /Zephyr-latest/boards/st/steval_fcu001v1/doc/ |
| D | index.rst | 47 - UART_1 TX/RX : PA9/PA10
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| /Zephyr-latest/boards/others/stm32f103_mini/doc/ |
| D | index.rst | 64 - UART_1 TX/RX: PA9/PA10
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