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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc20/pio/
Dsamc20e15a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
458 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
503 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
624 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc20e16a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
458 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
503 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
624 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc20e17a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
458 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
503 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
624 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc20e18a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
458 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
503 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
624 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd21/pio/
Dsamd21e18a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
113 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
210 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
293 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
347 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
413 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
458 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
579 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
634 #define PIN_PA10G_I2S_SCK0 _L_(10) /**< \brief I2S signal: SCK0 on PA10 mux G */
Dsamd21e15a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
113 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
210 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
293 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
347 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
413 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
458 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
579 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
634 #define PIN_PA10G_I2S_SCK0 _L_(10) /**< \brief I2S signal: SCK0 on PA10 mux G */
Dsamd21e16a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
113 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
210 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
293 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
347 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
413 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
458 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
579 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
634 #define PIN_PA10G_I2S_SCK0 _L_(10) /**< \brief I2S signal: SCK0 on PA10 mux G */
Dsamd21e17a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
113 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
210 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
293 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
347 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
413 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
458 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
579 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
634 #define PIN_PA10G_I2S_SCK0 _L_(10) /**< \brief I2S signal: SCK0 on PA10 mux G */
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc21/pio/
Dsamc21e15a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
467 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
512 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
633 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc21e16a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
467 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
512 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
633 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc21e17a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
467 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
512 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
633 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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Dsamc21e18a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
126 #define PIN_PA10A_RSTC_EXTWAKE10 _L_(10) /**< \brief RSTC signal: EXTWAKE10 on PA10 mux A */
171 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
268 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
338 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
392 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
467 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
512 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
633 #define PIN_PA10B_ADC0_AIN10 _L_(10) /**< \brief ADC0 signal: AIN10 on PA10 mux B */
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd20/pio/
Dsamd20e18.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
114 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
211 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
281 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
335 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
410 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
511 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
Dsamd20e15.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
114 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
211 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
281 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
335 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
410 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
511 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
Dsamd20e16.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
114 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
211 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
281 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
335 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
410 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
511 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
Dsamd20e17.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
114 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
211 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
281 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
335 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
410 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
511 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
Dsamd20e14.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
114 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
211 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
281 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
335 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
410 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
511 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/saml21/pio/
Dsaml21e15b.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
141 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
233 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
316 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
370 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
445 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
490 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
641 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
736 #define PIN_PA10I_CCL_IN5 _L_(10) /**< \brief CCL signal: IN5 on PA10 mux I */
Dsaml21e16b.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
141 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
233 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
316 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
370 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
445 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
490 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
641 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
736 #define PIN_PA10I_CCL_IN5 _L_(10) /**< \brief CCL signal: IN5 on PA10 mux I */
Dsaml21e17b.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
141 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
233 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
316 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
370 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
445 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
490 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
641 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
736 #define PIN_PA10I_CCL_IN5 _L_(10) /**< \brief CCL signal: IN5 on PA10 mux I */
Dsaml21e18b.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
141 #define PIN_PA10H_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux H */
233 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
316 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
370 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
445 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
490 #define PIN_PA10E_TCC1_WO0 _L_(10) /**< \brief TCC1 signal: WO0 on PA10 mux E */
641 #define PIN_PA10B_ADC_AIN18 _L_(10) /**< \brief ADC signal: AIN18 on PA10 mux B */
736 #define PIN_PA10I_CCL_IN5 _L_(10) /**< \brief CCL signal: IN5 on PA10 mux I */
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4l/pio/
Dsam4lc2a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define GPIO_PA10 _UL_(1 << 10) /**< \brief GPIO Mask for PA10 */
146 #define PIN_PA10B_TC0_A1 _L_(10) /**< \brief TC0 signal: A1 on PA10 mux B */
183 #define PIN_PA10A_USART0_CLK _L_(10) /**< \brief USART0 signal: CLK on PA10 mux A */
363 #define PIN_PA10D_PARC_PCDATA1 _L_(10) /**< \brief PARC signal: PCDATA1 on PA10 mux D */
436 #define PIN_PA10G_CATB_SENSE6 _L_(10) /**< \brief CATB signal: SENSE6 on PA10 mux G */
505 #define PIN_PA10F_LCDCA_COM2 _L_(10) /**< \brief LCDCA signal: COM2 on PA10 mux F */
583 #define PIN_PA10C_PEVC_PAD_EVT2 _L_(10) /**< \brief PEVC signal: PAD_EVT2 on PA10 mux C */
Dsam4lc4a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define GPIO_PA10 _UL_(1 << 10) /**< \brief GPIO Mask for PA10 */
146 #define PIN_PA10B_TC0_A1 _L_(10) /**< \brief TC0 signal: A1 on PA10 mux B */
183 #define PIN_PA10A_USART0_CLK _L_(10) /**< \brief USART0 signal: CLK on PA10 mux A */
363 #define PIN_PA10D_PARC_PCDATA1 _L_(10) /**< \brief PARC signal: PCDATA1 on PA10 mux D */
436 #define PIN_PA10G_CATB_SENSE6 _L_(10) /**< \brief CATB signal: SENSE6 on PA10 mux G */
505 #define PIN_PA10F_LCDCA_COM2 _L_(10) /**< \brief LCDCA signal: COM2 on PA10 mux F */
583 #define PIN_PA10C_PEVC_PAD_EVT2 _L_(10) /**< \brief PEVC signal: PAD_EVT2 on PA10 mux C */
Dsam4lc8a.h52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
53 #define GPIO_PA10 _UL_(1 << 10) /**< \brief GPIO Mask for PA10 */
146 #define PIN_PA10B_TC0_A1 _L_(10) /**< \brief TC0 signal: A1 on PA10 mux B */
183 #define PIN_PA10A_USART0_CLK _L_(10) /**< \brief USART0 signal: CLK on PA10 mux A */
363 #define PIN_PA10D_PARC_PCDATA1 _L_(10) /**< \brief PARC signal: PCDATA1 on PA10 mux D */
436 #define PIN_PA10G_CATB_SENSE6 _L_(10) /**< \brief CATB signal: SENSE6 on PA10 mux G */
505 #define PIN_PA10F_LCDCA_COM2 _L_(10) /**< \brief LCDCA signal: COM2 on PA10 mux F */
583 #define PIN_PA10C_PEVC_PAD_EVT2 _L_(10) /**< \brief PEVC signal: PAD_EVT2 on PA10 mux C */
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd51/pio/
Dsamd51g18a.h53 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */
54 #define PORT_PA10 (_UL_(1) << 10) /**< \brief PORT Mask for PA10 */
158 #define PIN_PA10M_GCLK_IO4 _L_(10) /**< \brief GCLK signal: IO4 on PA10 mux M */
300 #define PIN_PA10A_EIC_EXTINT10 _L_(10) /**< \brief EIC signal: EXTINT10 on PA10 mux A */
380 #define PIN_PA10C_SERCOM0_PAD2 _L_(10) /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */
455 #define PIN_PA10E_TC1_WO0 _L_(10) /**< \brief TC1 signal: WO0 on PA10 mux E */
501 #define PIN_PA10D_SERCOM2_PAD2 _L_(10) /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */
579 #define PIN_PA10F_TCC0_WO2 _L_(10) /**< \brief TCC0 signal: WO2 on PA10 mux F */
680 #define PIN_PA10G_TCC1_WO6 _L_(10) /**< \brief TCC1 signal: WO6 on PA10 mux G */
826 #define PIN_PA10H_QSPI_DATA2 _L_(10) /**< \brief QSPI signal: DATA2 on PA10 mux H */
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