Home
last modified time | relevance | path

Searched full:pa1 (Results 1 – 25 of 65) sorted by relevance

123

/hal_atmel-3.7.0/asf/sam/include/same70b/pio/
Dsame70n21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
689 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
932 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
996 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70n19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
689 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
932 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
996 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70n20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
689 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
932 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
996 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70j21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
634 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
844 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
908 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70j19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
634 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
844 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
908 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70j20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
634 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
844 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
908 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70q21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1212 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1528 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1592 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70q19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1212 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1528 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1592 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70q20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1212 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1528 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1592 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
/hal_atmel-3.7.0/asf/sam/include/samv71b/pio/
Dsamv71n19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
702 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
945 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1009 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71n20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
702 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
945 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1009 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71n21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
440 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
702 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
945 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1009 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71j21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
647 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
857 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
921 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71j19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
647 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
857 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
921 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71j20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
647 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
857 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
921 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71q19b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1225 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1541 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1605 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71q20b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1225 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1541 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1605 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71q21b.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
153 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
270 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
547 #define PIN_PA1C_EBI_A18 _L_(1) /**< EBI signal: A18 on PA1 mux C*/
926 #define PIN_PA1D_I2SC0_CK _L_(1) /**< I2SC0 signal: CK on PA1 mux D*/
1225 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
1541 #define PIN_PA1X1_SUPC_WKUP1 _L_(1) /**< SUPC signal: WKUP1 on PA1 mux …
1605 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
/hal_atmel-3.7.0/asf/sam/include/samv71/pio/
Dsamv71n19.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
683 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
936 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71n20.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
672 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
925 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsamv71n21.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
672 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
925 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
/hal_atmel-3.7.0/asf/sam/include/same70/pio/
Dsame70n20.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
670 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
923 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70n19.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
670 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
923 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70n21.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
670 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …
923 #define PIN_PA1B_TC0_TIOB0 _L_(1) /**< TC0 signal: TIOB0 on PA1 mux B…
Dsame70j20.h36 #define PIN_PA1 ( 1) /**< Pin Number for PA1 */
115 #define PIO_PA1 (_U_(1) << 1) /**< PIO Mask for PA1 */
194 #define PIO_PA1_IDX ( 1) /**< PIO Index Number for PA1 */
636 #define PIN_PA1A_PWM0_PWML0 _L_(1) /**< PWM0 signal: PWML0 on PA1 mux …

123