Searched full:pa07 (Results 1 – 25 of 136) sorted by relevance
123456
47 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */48 #define PORT_PA07 (_UL_(1) << 7) /**< \brief PORT Mask for PA07 */112 #define PIN_PA07A_RSTC_EXTWAKE7 _L_(7) /**< \brief RSTC signal: EXTWAKE7 on PA07 mux A */218 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */320 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */498 #define PIN_PA07E_TCC1_WO1 _L_(7) /**< \brief TCC1 signal: WO1 on PA07 mux E */629 #define PIN_PA07B_ADC_AIN7 _L_(7) /**< \brief ADC signal: AIN7 on PA07 mux B */666 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */683 #define PIN_PA07B_OPAMP_OAOUT0 _L_(7) /**< \brief OPAMP signal: OAOUT0 on PA07 mux B */752 #define PIN_PA07I_CCL_OUT0 _L_(7) /**< \brief CCL signal: OUT0 on PA07 mux I */
46 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */47 #define GPIO_PA07 _UL_(1 << 7) /**< \brief GPIO Mask for PA07 */207 #define PIN_PA07B_USART0_TXD _L_(7) /**< \brief USART0 signal: TXD on PA07 mux B */274 #define PIN_PA07A_ADCIFE_AD2 _L_(7) /**< \brief ADCIFE signal: AD2 on PA07 mux A */292 #define PIN_PA07E_ACIFC_ACAP0 _L_(7) /**< \brief ACIFC signal: ACAP0 on PA07 mux E */321 #define PIN_PA07D_GLOC_IN3 _L_(7) /**< \brief GLOC signal: IN3 on PA07 mux D */424 #define PIN_PA07G_CATB_SENSE3 _L_(7) /**< \brief CATB signal: SENSE3 on PA07 mux G */643 #define PIN_PA07C_EIC_EXTINT4 _L_(7) /**< \brief EIC signal: EXTINT4 on PA07 mux C */
46 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */47 #define GPIO_PA07 _UL_(1 << 7) /**< \brief GPIO Mask for PA07 */258 #define PIN_PA07B_USART0_TXD _L_(7) /**< \brief USART0 signal: TXD on PA07 mux B */346 #define PIN_PA07A_ADCIFE_AD2 _L_(7) /**< \brief ADCIFE signal: AD2 on PA07 mux A */364 #define PIN_PA07E_ACIFC_ACAP0 _L_(7) /**< \brief ACIFC signal: ACAP0 on PA07 mux E */393 #define PIN_PA07D_GLOC_IN3 _L_(7) /**< \brief GLOC signal: IN3 on PA07 mux D */552 #define PIN_PA07G_CATB_SENSE3 _L_(7) /**< \brief CATB signal: SENSE3 on PA07 mux G */706 #define PIN_PA07C_EIC_EXTINT4 _L_(7) /**< \brief EIC signal: EXTINT4 on PA07 mux C */
47 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */48 #define PORT_PA07 (_UL_(1) << 7) /**< \brief PORT Mask for PA07 */114 #define PIN_PA07A_RSTC_EXTWAKE7 _L_(7) /**< \brief RSTC signal: EXTWAKE7 on PA07 mux A */248 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */342 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */520 #define PIN_PA07E_TCC1_WO1 _L_(7) /**< \brief TCC1 signal: WO1 on PA07 mux E */621 #define PIN_PA07B_ADC0_AIN7 _L_(7) /**< \brief ADC0 signal: AIN7 on PA07 mux B */659 #define PIN_PA07B_SDADC_INP0 _L_(7) /**< \brief SDADC signal: INP0 on PA07 mux B */680 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */778 #define PIN_PA07I_CCL_OUT0 _L_(7) /**< \brief CCL signal: OUT0 on PA07 mux I */
47 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */48 #define PORT_PA07 (_UL_(1) << 7) /**< \brief PORT Mask for PA07 */114 #define PIN_PA07A_RSTC_EXTWAKE7 _L_(7) /**< \brief RSTC signal: EXTWAKE7 on PA07 mux A */248 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */342 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */511 #define PIN_PA07E_TCC1_WO1 _L_(7) /**< \brief TCC1 signal: WO1 on PA07 mux E */612 #define PIN_PA07B_ADC0_AIN7 _L_(7) /**< \brief ADC0 signal: AIN7 on PA07 mux B */649 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */738 #define PIN_PA07I_CCL_OUT0 _L_(7) /**< \brief CCL signal: OUT0 on PA07 mux I */
47 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */48 #define PORT_PA07 (_UL_(1) << 7) /**< \brief PORT Mask for PA07 */191 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */285 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */414 #define PIN_PA07F_TC1_WO1 _L_(7) /**< \brief TC1 signal: WO1 on PA07 mux F */499 #define PIN_PA07B_ADC_AIN7 _L_(7) /**< \brief ADC signal: AIN7 on PA07 mux B */536 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */
46 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */47 #define PORT_PA07 (_UL_(1) << 7) /**< \brief PORT Mask for PA07 */190 #define PIN_PA07A_EIC_EXTINT7 _L_(7) /**< \brief EIC signal: EXTINT7 on PA07 mux A */297 #define PIN_PA07D_SERCOM0_PAD3 _L_(7) /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */466 #define PIN_PA07E_TCC1_WO1 _L_(7) /**< \brief TCC1 signal: WO1 on PA07 mux E */567 #define PIN_PA07B_ADC_AIN7 _L_(7) /**< \brief ADC signal: AIN7 on PA07 mux B */604 #define PIN_PA07B_AC_AIN3 _L_(7) /**< \brief AC signal: AIN3 on PA07 mux B */638 #define PIN_PA07G_I2S_SD0 _L_(7) /**< \brief I2S signal: SD0 on PA07 mux G */
