Searched full:pa05 (Results 1 – 25 of 132) sorted by relevance
123456
43 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */44 #define PORT_PA05 (_UL_(1) << 5) /**< \brief PORT Mask for PA05 */104 #define PIN_PA05A_RSTC_EXTWAKE5 _L_(5) /**< \brief RSTC signal: EXTWAKE5 on PA05 mux A */203 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */304 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */437 #define PIN_PA05E_TCC0_WO1 _L_(5) /**< \brief TCC0 signal: WO1 on PA05 mux E */566 #define PIN_PA05B_DAC_VOUT1 _L_(5) /**< \brief DAC signal: VOUT1 on PA05 mux B */621 #define PIN_PA05B_ADC_AIN5 _L_(5) /**< \brief ADC signal: AIN5 on PA05 mux B */658 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */695 #define PIN_PA05B_OPAMP_OAPOS2 _L_(5) /**< \brief OPAMP signal: OAPOS2 on PA05 mux B */[all …]
43 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */44 #define PORT_PA05 (_UL_(1) << 5) /**< \brief PORT Mask for PA05 */128 #define PIN_PA05A_RSTC_EXTWAKE5 _L_(5) /**< \brief RSTC signal: EXTWAKE5 on PA05 mux A */275 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */421 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */594 #define PIN_PA05E_TCC0_WO1 _L_(5) /**< \brief TCC0 signal: WO1 on PA05 mux E */771 #define PIN_PA05B_DAC_VOUT1 _L_(5) /**< \brief DAC signal: VOUT1 on PA05 mux B */858 #define PIN_PA05B_ADC_AIN5 _L_(5) /**< \brief ADC signal: AIN5 on PA05 mux B */903 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */956 #define PIN_PA05B_OPAMP_OAPOS2 _L_(5) /**< \brief OPAMP signal: OAPOS2 on PA05 mux B */[all …]
42 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */43 #define GPIO_PA05 _UL_(1 << 5) /**< \brief GPIO Mask for PA05 */199 #define PIN_PA05B_USART0_RXD _L_(5) /**< \brief USART0 signal: RXD on PA05 mux B */270 #define PIN_PA05A_ADCIFE_AD1 _L_(5) /**< \brief ADCIFE signal: AD1 on PA05 mux A */278 #define PIN_PA05E_ADCIFE_TRIGGER _L_(5) /**< \brief ADCIFE signal: TRIGGER on PA05 mux E */313 #define PIN_PA05D_GLOC_IN2 _L_(5) /**< \brief GLOC signal: IN2 on PA05 mux D */416 #define PIN_PA05G_CATB_SENSE1 _L_(5) /**< \brief CATB signal: SENSE1 on PA05 mux G */633 #define PIN_PA05C_EIC_EXTINT3 _L_(5) /**< \brief EIC signal: EXTINT3 on PA05 mux C */
42 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */43 #define GPIO_PA05 _UL_(1 << 5) /**< \brief GPIO Mask for PA05 */250 #define PIN_PA05B_USART0_RXD _L_(5) /**< \brief USART0 signal: RXD on PA05 mux B */342 #define PIN_PA05A_ADCIFE_AD1 _L_(5) /**< \brief ADCIFE signal: AD1 on PA05 mux A */350 #define PIN_PA05E_ADCIFE_TRIGGER _L_(5) /**< \brief ADCIFE signal: TRIGGER on PA05 mux E */385 #define PIN_PA05D_GLOC_IN2 _L_(5) /**< \brief GLOC signal: IN2 on PA05 mux D */536 #define PIN_PA05G_CATB_SENSE1 _L_(5) /**< \brief CATB signal: SENSE1 on PA05 mux G */696 #define PIN_PA05C_EIC_EXTINT3 _L_(5) /**< \brief EIC signal: EXTINT3 on PA05 mux C */
43 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */44 #define PORT_PA05 (_UL_(1) << 5) /**< \brief PORT Mask for PA05 */106 #define PIN_PA05A_RSTC_EXTWAKE5 _L_(5) /**< \brief RSTC signal: EXTWAKE5 on PA05 mux A */233 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */326 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */450 #define PIN_PA05E_TCC0_WO1 _L_(5) /**< \brief TCC0 signal: WO1 on PA05 mux E */604 #define PIN_PA05B_ADC0_AIN5 _L_(5) /**< \brief ADC0 signal: AIN5 on PA05 mux B */641 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */694 #define PIN_PA05I_CCL_IN1 _L_(5) /**< \brief CCL signal: IN1 on PA05 mux I */
43 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */44 #define PORT_PA05 (_UL_(1) << 5) /**< \brief PORT Mask for PA05 */176 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */269 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */393 #define PIN_PA05F_TC0_WO1 _L_(5) /**< \brief TC0 signal: WO1 on PA05 mux F */491 #define PIN_PA05B_ADC_AIN5 _L_(5) /**< \brief ADC signal: AIN5 on PA05 mux B */528 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */
43 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */44 #define PORT_PA05 (_UL_(1) << 5) /**< \brief PORT Mask for PA05 */106 #define PIN_PA05A_RSTC_EXTWAKE5 _L_(5) /**< \brief RSTC signal: EXTWAKE5 on PA05 mux A */233 #define PIN_PA05A_EIC_EXTINT5 _L_(5) /**< \brief EIC signal: EXTINT5 on PA05 mux A */326 #define PIN_PA05D_SERCOM0_PAD1 _L_(5) /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */459 #define PIN_PA05E_TCC0_WO1 _L_(5) /**< \brief TCC0 signal: WO1 on PA05 mux E */613 #define PIN_PA05B_ADC0_AIN5 _L_(5) /**< \brief ADC0 signal: AIN5 on PA05 mux B */672 #define PIN_PA05B_AC_AIN1 _L_(5) /**< \brief AC signal: AIN1 on PA05 mux B */734 #define PIN_PA05I_CCL_IN1 _L_(5) /**< \brief CCL signal: IN1 on PA05 mux I */
