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/Zephyr-latest/include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx/
Doff_raw_tx_api.h4 * SPDX-License-Identifier: Apache-2.0
28 * @brief- Transmission rates
78 * @brief- HE guard interval value
94 * @brief- HE long training field duration
109 * @brief- Throughput mode
110 * Throughput mode to be used for transmitting the packet.
113 /** Legacy mode */
115 /** High Throughput mode (11n) */
117 /** Very high throughput mode (11ac) */
119 /** HE SU mode */
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/Zephyr-latest/drivers/dma/
DKconfig.iproc_pax2 # SPDX-License-Identifier: Apache-2.0
6 prompt "Broadcom PAX(PCIE<->AXI) DMA driver"
13 prompt "Broadcom PAX(PCIE<->AXI) DMA driver version 2"
38 bool "PAX DMA API in polling mode"
51 prompt "PAX DMA Ring operation mode"
55 bool "PAX DMA Ring toggle mode"
57 PAX DMA hardware ring operation in toggle mode
60 bool "PAX DMA Ring door bell mode"
62 PAX DMA hardware ring operation in doorbell mode
/Zephyr-latest/include/zephyr/drivers/flash/
Dnpcx_flash_api_ex.h4 * SPDX-License-Identifier: Apache-2.0
18 * NPCX User Mode Access (UMA) mode execution.
20 * Execute a SPI transaction via User Mode Access (UMA) mode. Users can
27 * NPCX Configure specific operation for Quad-SPI nor flash.
29 * It configures specific operation for Quad-SPI nor flash such as lock
30 * or unlock UMA mode, set write protection pin of internal flash, and
35 * NPCX Get specific operation for Quad-SPI nor flash.
37 * It returns current specific operation for Quad-SPI nor flash.
68 #define NPCX_EX_OP_LOCK_UMA BIT(0) /* Lock/Unlock UMA mode */
/Zephyr-latest/dts/bindings/stepper/adi/
Dadi,trinamic-gconf.yaml1 # SPDX-FileCopyrightText: Copyright (c) 2024 Carl Zeiss Meditec AG
2 # SPDX-License-Identifier: Apache-2.0
11 0: StealthChop mode
12 1: SpreadCycle mode enabled
23 0: Operation with external sense resistors
25 sense resistor. VREF pin internally is driven to GND in this mode.
42 0: Normal operation
43 1: Power down mode
59 pull-up or set poscmp_enable=1
64 Enable test mode
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/Zephyr-latest/include/zephyr/drivers/i3c/
Dtarget_device.h4 * SPDX-License-Identifier: Apache-2.0
63 * True if lower 32-bit of Provisioned ID is random.
66 * the lower 32-bit is random value.
83 * Bit mask of supported HDR modes (0 - 7).
85 * This can be used to enable or disable HDR mode
123 * a start condition for a write operation to the address associated
131 * device to which the operation is addressed.
141 * reception of a byte of data in an ongoing write operation to the
149 * device to which the operation is addressed.
163 * start condition for a read operation from the address associated
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/Zephyr-latest/drivers/flash/
DKconfig.renesas_ra4 # SPDX-License-Identifier: Apache-2.0
22 bool "Extended operation for flash write protection control"
25 Enables flash extended operation to enable/disable flash write
29 bool "Dual bank mode"
31 Enable dual bank mode
Dflash_npcx_fiu_qspi.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h>
23 ((struct fiu_reg *)((const struct npcx_qspi_fiu_config *)(dev)->config)->base)
41 /* Current Software controlled Chip-Select number */
43 /* Current QSPI bus operation */
44 uint32_t operation; member
47 /* NPCX SPI User Mode Access (UMA) functions */
54 inst->UMA_ECTS |= BIT(sw_cs); in qspi_npcx_uma_cs_level()
56 inst->UMA_ECTS &= ~BIT(sw_cs); in qspi_npcx_uma_cs_level()
65 inst->UMA_CODE = data; in qspi_npcx_uma_write_byte()
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Dflash_npcx_fiu_qspi.h4 * SPDX-License-Identifier: Apache-2.0
17 /* UMA operation flags */
28 /* UMA operation configuration for a SPI device */
47 /* Enter four bytes address mode value */
49 /* SPI read access type of Direct Read Access mode */
51 /* Configurations for the Quad-SPI peripherals */
61 * @retval 0 on success, -EPERM if an UMA transaction is not permitted.
71 * @param operation Qspi bus operation for the device.
75 const uint32_t operation);
Dflash_cadence_nand_ll.c4 * SPDX-License-Identifier: Apache-2.0
14 * @retval 0 on success or -ETIMEDOUT error value on failure.
22 return -ETIMEDOUT; in cdns_nand_wait_idle()
39 block_number = ((page_set) / (params->npages_per_block)); in row_address_set()
41 *local_row_address |= ROW_VAL_SET((params->page_size_bit) - 1, 0, in row_address_set()
42 ((page_set) % (params->npages_per_block))); in row_address_set()
44 ROW_VAL_SET((params->block_size_bit) - 1, (params->page_size_bit), block_number); in row_address_set()
45 *local_row_address |= ROW_VAL_SET((params->lun_size_bit) - 1, (params->block_size_bit), in row_address_set()
46 (block_number / params->nblocks_per_lun)); in row_address_set()
53 * @retval 0 on success or -ENXIO error value on failure.
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DKconfig.stm327 # SPDX-License-Identifier: Apache-2.0
16 This option enables the XIP mode for the external NOR flash
35 bool "Extended operation for flash write protection control"
40 Enables flash extended operation for enabling/disabling flash write
52 bool "Extended operation for flash readout protection control"
59 Enables flash extended operation for enabling/disabling flash readout
79 bool "Extended operation for blocking option and control registers"
89 bool "Extended operation for option bytes access"
101 the Global Block Protection Unlock instruction (ULBPR - 98H),
/Zephyr-latest/modules/
DKconfig.mcuboot3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
6 # SPDX-License-Identifier: Apache-2.0
20 or in other words that the image is to be chain-loaded by MCUboot.
27 * Activating SW_VECTOR_RELAY_CLIENT on Cortex-M0
28 (or Armv8-M baseline) targets with no built-in vector relocation
46 If set to a non-empty value, the build system tries to
47 sign the final binaries using a 'west sign -t imgtool' command.
76 If set to a non-empty value, the build system tries to
77 sign and encrypt the final binaries using a 'west sign -t imgtool'
88 Example: './bootloader/mcuboot/enc-rsa2048-pub.pem'
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/Zephyr-latest/tests/boards/mec15xxevb_assy6853/qspi/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
52 /* configure spi as single mode */ in spi_single_init()
54 spi_cfg_single.operation = SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB in spi_single_init()
63 * - Find spi device
64 * - Read flash jedec id
99 * - write enable
100 * - erase data in flash device
101 * - read register1 and wait for erase operation completed
146 /* read register1 to check whether erase operation completed */ in ZTEST_USER()
162 /* waiting for erase operation completed */ in ZTEST_USER()
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/Zephyr-latest/include/zephyr/console/
Dtty.h4 * SPDX-License-Identifier: Apache-2.0
37 * "tty" device provides support for buffered, interrupt-driven,
38 * timeout-controlled access to an underlying UART device. For
39 * completeness, it also support non-interrupt-driven, busy-polling
40 * access mode. After initialization, tty is in the "most conservative"
41 * unbuffered mode with infinite timeouts (this is guaranteed to work
48 * interrupt-driven operation)
57 * Set timeout for getchar() operation. Default timeout after
65 tty->rx_timeout = timeout; in tty_set_rx_timeout()
71 * Set timeout for putchar() operation, for a case when output buffer is full.
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/Zephyr-latest/drivers/spi/
Dspi_numaker.c2 * SPDX-License-Identifier: Apache-2.0
42 * CPOL/CPHA = 0/0 --> SPI_MODE_0
43 * CPOL/CPHA = 0/1 --> SPI_MODE_1
44 * CPOL/CPHA = 1/0 --> SPI_MODE_2
45 * CPOL/CPHA = 1/1 --> SPI_MODE_3
57 int mode; in spi_numaker_configure() local
58 struct spi_numaker_data *data = dev->data; in spi_numaker_configure()
59 const struct spi_numaker_config *dev_cfg = dev->config; in spi_numaker_configure()
62 if (spi_context_configured(&data->ctx, config)) { in spi_numaker_configure()
66 if (SPI_MODE_GET(config->operation) & SPI_MODE_LOOP) { in spi_numaker_configure()
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Dspi_b91.c4 * SPDX-License-Identifier: Apache-2.0
38 #define SPI_CFG(dev) ((struct spi_b91_cfg *) ((dev)->config))
44 #define SPI_DATA(dev) ((struct spi_b91_data *) ((dev)->data))
55 pin = config->cs_pin[i]; in spi_b91_hw_cs_disable()
59 if (config->peripheral_id == PSPI_MODULE) { in spi_b91_hw_cs_disable()
87 if (config->slave >= CHIP_SELECT_COUNT) { in spi_b91_config_cs()
88 LOG_ERR("Slave %d not supported (max. %d)", config->slave, CHIP_SELECT_COUNT - 1); in spi_b91_config_cs()
95 cs_pin = b91_config->cs_pin[cs_id]; in spi_b91_config_cs()
98 if ((cs_pin == 0) && (cs_id == config->slave)) { in spi_b91_config_cs()
99 LOG_ERR("cs%d-pin is not defined in device tree", config->slave); in spi_b91_config_cs()
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Dspi_nrfx_spis.c4 * SPDX-License-Identifier: Apache-2.0
36 static inline nrf_spis_mode_t get_nrf_spis_mode(uint16_t operation) in get_nrf_spis_mode() argument
38 if (SPI_MODE_GET(operation) & SPI_MODE_CPOL) { in get_nrf_spis_mode()
39 if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) { in get_nrf_spis_mode()
45 if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) { in get_nrf_spis_mode()
53 static inline nrf_spis_bit_order_t get_nrf_spis_bit_order(uint16_t operation) in get_nrf_spis_bit_order() argument
55 if (operation & SPI_TRANSFER_LSB) { in get_nrf_spis_bit_order()
65 const struct spi_nrfx_config *dev_config = dev->config; in configure()
66 struct spi_nrfx_data *dev_data = dev->data; in configure()
67 struct spi_context *ctx = &dev_data->ctx; in configure()
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Dspi_cc13xx_cc26xx.c4 * SPDX-License-Identifier: Apache-2.0
41 const struct spi_cc13xx_cc26xx_config *cfg = dev->config; in spi_cc13xx_cc26xx_configure()
42 struct spi_cc13xx_cc26xx_data *data = dev->data; in spi_cc13xx_cc26xx_configure()
43 struct spi_context *ctx = &data->ctx; in spi_cc13xx_cc26xx_configure()
51 if (config->operation & SPI_HALF_DUPLEX) { in spi_cc13xx_cc26xx_configure()
52 LOG_ERR("Half-duplex not supported"); in spi_cc13xx_cc26xx_configure()
53 return -ENOTSUP; in spi_cc13xx_cc26xx_configure()
56 /* Slave mode has not been implemented */ in spi_cc13xx_cc26xx_configure()
57 if (SPI_OP_MODE_GET(config->operation) != SPI_OP_MODE_MASTER) { in spi_cc13xx_cc26xx_configure()
58 LOG_ERR("Slave mode is not supported"); in spi_cc13xx_cc26xx_configure()
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Dspi_litex_litespi.c4 * SPDX-License-Identifier: Apache-2.0
44 const struct spi_litex_dev_config *dev_config = dev->config; in spi_litex_set_frequency()
46 if (!dev_config->phy_clk_divisor_exists) { in spi_litex_set_frequency()
52 uint32_t divisor = DIV_ROUND_UP(sys_clock_hw_cycles_per_sec(), (2 * config->frequency)) - 1; in spi_litex_set_frequency()
54 litex_write32(divisor, dev_config->phy_clk_divisor_addr); in spi_litex_set_frequency()
61 struct spi_litex_data *dev_data = dev->data; in spi_config()
63 if (config->slave != 0) { in spi_config()
64 if (config->slave >= SPI_MAX_CS_SIZE) { in spi_config()
66 return -ENOTSUP; in spi_config()
70 if (config->operation & SPI_HALF_DUPLEX) { in spi_config()
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/Zephyr-latest/include/zephyr/crypto/
Dcrypto.h4 * SPDX-License-Identifier: Apache-2.0
73 enum cipher_algo algo, enum cipher_mode mode,
95 * have four cipher mode specific (CTR, CCM, CBC ...) calls to perform the
96 * actual crypto operation in the context of a session. Also we have an
116 api = (struct crypto_driver_api *) dev->api; in crypto_query_hwcaps()
118 tmp = api->query_hw_caps(dev); in crypto_query_hwcaps()
127 "Driver should support at least one op-type: sync/async"); in crypto_query_hwcaps()
147 * mode which may remain constant for all operations in the session. The state
157 * @param mode The cipher mode to be used in this session. e.g CBC, CTR
165 enum cipher_mode mode, in cipher_begin_session() argument
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/Zephyr-latest/arch/arm/include/cortex_m/
Dcmse.h4 * SPDX-License-Identifier: Apache-2.0
11 * CMSE API for Cortex-M23/M33 CPUs.
40 * Return the non-negative MPU region that the address maps to,
41 * or -EINVAL to indicate that an invalid MPU region was retrieved.
45 * - the function is called from privileged mode
46 * - the MPU is implemented and enabled
47 * - the given address matches a single, enabled MPU region
51 * @return a valid MPU region number or -EINVAL
59 * permissions of the current state MPU and the specified operation mode.
62 * - if executed from an unprivileged mode,
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/Zephyr-latest/doc/develop/api/
Dterminology.rst7 allowed calling context (thread, ISR, pre-kernel), the effect of a call
14 :ref:`api_term_no-wait`
17 :ref:`api_term_isr-ok`
20 :ref:`api_term_pre-kernel-ok`
25 if the function may return before the operation it initializes is
26 complete (i.e. function return and operation completion are
44 -------
48 a consequence of a higher-priority thread being made ready. Whether the
49 suspension actually occurs depends on the operation associated with the
73 -----------
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/Zephyr-latest/dts/bindings/sensor/
Dvishay,vcnl36825t.yaml2 # SPDX-License-Identifier: Apache-2.0
10 include: [sensor-device.yaml, i2c-device.yaml]
13 operation-mode:
18 Mode of operation.
19 - "auto": the sensor performs sampling continuously,
20 - "force": the sampling is performed on every fetch command.
24 Note: "force"-mode only available if low-power mode inactive.
26 measurement-period:
34 - [10, 80] ms only if low power mode is inactive
35 - [80, 320] ms only in low power mode
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/Zephyr-latest/dts/bindings/clock/
Dsilabs,hfxo.yaml3 include: fixed-clock.yaml
14 mode:
17 Mode of operation. Defaults to "xtal", expecting a crystal oscillator on XI and XO
/Zephyr-latest/drivers/sensor/st/lis2dh/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
13 Enable SPI/I2C-based driver for LIS2DH, LIS3DH, LSM303DLHC,
19 prompt "Trigger mode"
29 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_ST_LIS2DH),irq-gpios)
35 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_ST_LIS2DH),irq-gpios)
67 bool "+/-2g"
70 bool "+/-4g"
73 bool "+/-8g"
76 bool "+/-16g"
81 prompt "Operation mode"
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/Zephyr-latest/tests/boards/mec172xevb_assy6906/qspi/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
30 * bits[15:8] = bytes number of clocks with data lines tri-stated
53 .operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8)
59 .operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8)
65 .operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8)
71 .operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8)
87 * SPI clocks based on single, dual, or quad mode.
88 * mode = 1(full-duplex), 2(dual), 4(quad)
89 * full-duplex: 8 clocks per byte
93 static uint32_t spi_clocks_to_bytes(uint32_t spi_clocks, uint8_t mode) in spi_clocks_to_bytes() argument
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