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/Zephyr-latest/tests/subsys/pm/power_mgmt_multicore/
Dtestcase.yaml2 pm.multicore:
/Zephyr-latest/boards/snps/hsdk4xd/
DKconfig.hsdk4xd11 a multicore ARC HS4x/HS4xD-based chip and integrates a wide range
/Zephyr-latest/samples/drivers/ipm/ipm_imx/
DREADME.rst9 This simple example can be used with multicore i.MX SoCs containing a
31 multicore processors.
/Zephyr-latest/drivers/hwinfo/
DKconfig107 bool "NXP SRC reset cause (multicore devices)"
112 Enable version 2 multicore NXP i.MX mcux SRC hwinfo driver.
/Zephyr-latest/cmake/emu/
Dnsim.cmake3 # mdb is required to run nsim multicore targets
/Zephyr-latest/samples/drivers/ipm/ipm_esp32/
DREADME.rst9 This simple example can be used with multicore ESP32 Soc, and demonstrates
/Zephyr-latest/tests/subsys/pm/power_mgmt_multicore/src/
Dmain.c89 * @brief test power idle in multicore
/Zephyr-latest/arch/arc/core/
Dsmp.c9 * @brief codes required for ARC multicore and Zephyr smp support
/Zephyr-latest/modules/hal_nordic/
DKconfig210 …If this option is modified on a multicore SoC, its remote counterpart must be set to the exact sam…
/Zephyr-latest/arch/arm64/core/
Dsmp.c10 * @brief codes required for AArch64 multicore and Zephyr smp support
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dpower.c18 * NOTE: When multicore support in RT1170/1160 is properly implemented,
/Zephyr-latest/boards/sensry/ganymed_bob/doc/
Dindex.rst14 The Ganymed board hardware provides support for the Ganymed sy1xx series IoT multicore
/Zephyr-latest/boards/nordic/nrf54h20dk/doc/
Dindex.rst17 The nRF54H20 is a multicore SoC with:
/Zephyr-latest/boards/nordic/nrf54l15dk/doc/
Dindex.rst100 to be built as multicore configuration with code snippet called ``vpr_launcher``
/Zephyr-latest/doc/releases/
Drelease-notes-1.7.rst243 * ``ZEP-1103`` - Propose and implement synchronization flow for multicore power management
437 * ``ZEP-1778`` - tests/power: multicore case won't work as expected
Drelease-notes-2.1.rst70 * Add support to boot multicore system
Drelease-notes-3.0.rst796 * Proper multicore support. Devices are suspended only when the last
Drelease-notes-3.7.rst224 * Added HW memory barrier API support for multicore targets
Drelease-notes-2.6.rst2044 * :github:`30441` - hci_uart uses wrong BT_BUF_ACL_SIZE on dual chip solutions + multicore
/Zephyr-latest/doc/services/logging/
Dcs_stm.rst105 Assisted multicore logging uses dictionary-based logging to send messages without redundant strings
Dindex.rst522 independent binary. Examples of domains are a core in a multicore SoC or one
/Zephyr-latest/boards/toradex/verdin_imx8mm/doc/
Dindex.rst17 multicore system allows for the running of additional real-time operating systems on the M4 cores
/Zephyr-latest/boards/udoo/udoo_neo_full/doc/
Dindex.rst7 It is equipped with an NXP |reg| i.MX 6SoloX hybrid multicore processor
/Zephyr-latest/boards/nxp/frdm_mcxn947/doc/
Dindex.rst271 …m-cortex-m/mcx-n-series-microcontrollers/mcx-n94x-54x-highly-integrated-multicore-mcus-with-on-chi…
/Zephyr-latest/boards/snps/hsdk4xd/doc/
Dindex.rst7 It includes a multicore ARC HS4xD-based chip that integrates a wide range of interfaces

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