Home
last modified time | relevance | path

Searched +full:multi +full:- +full:image (Results 1 – 25 of 102) sorted by relevance

12345

/Zephyr-latest/boards/nordic/nrf5340dk/
DKconfig3 # Copyright (c) 2019 - 2021 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
12 The board which will be used for CPUNET domain when creating a multi
13 image application where one or more images should be located on
24 The board which will be used for CPUAPP domain when creating a multi
25 image application where one or more images should be located on
/Zephyr-latest/boards/nordic/nrf5340_audio_dk/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
12 The board which will be used for CPUNET domain when creating a multi
13 image application where one or more images should be located on
25 The board which will be used for CPUAPP domain when creating a multi
26 image application where one or more images should be located on
/Zephyr-latest/boards/raytac/mdbt53_db_40/
DKconfig1 # Ratac MDBT53-DB-40 nRF5340 board configuration
3 # Copyright (c) 2019 - 2021 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
12 The board which will be used for CPUNET domain when creating a multi
13 image application where one or more images should be located on
25 The board which will be used for CPUAPP domain when creating a multi
26 image application where one or more images should be located on
/Zephyr-latest/boards/raytac/mdbt53v_db_40/
DKconfig1 # Ratac MDBT53V-DB-40 nRF5340 board configuration
3 # Copyright (c) 2019 - 2021 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
12 The board which will be used for CPUNET domain when creating a multi
13 image application where one or more images should be located on
25 The board which will be used for CPUAPP domain when creating a multi
26 image application where one or more images should be located on
/Zephyr-latest/boards/ezurio/bl5340_dvk/
DKconfig1 # BL5340-DVK board configuration
3 # Copyright (c) 2019-2021 Nordic Semiconductor ASA
4 # Copyright (c) 2021-2023 Laird Connectivity
5 # SPDX-License-Identifier: Apache-2.0
13 The board which will be used for CPUNET domain when creating a multi
14 image application where one or more images should be located on
26 The board which will be used for CPUAPP domain when creating a multi
27 image application where one or more images should be located on
/Zephyr-latest/boards/nordic/thingy53/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
18 The board which will be used for CPUNET domain when creating a multi
19 image application where one or more images should be located on
31 The board which will be used for CPUAPP domain when creating a multi
32 image application where one or more images should be located on
/Zephyr-latest/boards/panasonic/pan1783/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
14 The board which will be used for CPUNET domain when creating a multi
15 image application where one or more images should be located on
27 The board which will be used for CPUAPP domain when creating a multi
28 image application where one or more images should be located on
/Zephyr-latest/boards/nordic/nrf7002dk/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
26 The board which will be used for CPUNET domain when creating a multi
27 image application where one or more images should be located on
43 The board which will be used for CPUAPP domain when creating a multi
44 image application where one or more images should be located on
/Zephyr-latest/share/sysbuild/cmake/modules/
Dsysbuild_images.cmake3 # SPDX-License-Identifier: Apache-2.0
12 # This is where all Zephyr applications are added to the multi-image build.
18 foreach(image ${IMAGES_CONFIGURATION_ORDER})
19 …build_module_call(PRE_IMAGE_CMAKE MODULES ${SYSBUILD_MODULE_NAMES} IMAGES ${IMAGES} IMAGE ${image})
20 ExternalZephyrProject_Cmake(APPLICATION ${image})
21 …uild_module_call(POST_IMAGE_CMAKE MODULES ${SYSBUILD_MODULE_NAMES} IMAGES ${IMAGES} IMAGE ${image})
/Zephyr-latest/dts/bindings/flash_controller/
Dst,stm32-flash-controller.yaml3 compatible: "st,stm32-flash-controller"
5 include: flash-controller.yaml
8 st,rdp1-enable-byte:
12 This property provides a byte which should used to enable non-permanent
15 RDP1 but in multi-image environment, some other image could check if
/Zephyr-latest/subsys/dfu/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
11 bool "DFU image manager"
15 Enable support for managing DFU image.
20 prompt "Image manager"
23 Choice support for managing DFU image.
27 bool "Image manager for mcuboot"
31 Enable support for managing DFU image downloaded using mcuboot.
41 Enable shell module, which provides information about image slots and
51 (https://github.com/JuulLabs-OSS/mcuboot/pull/485)
59 Estimated size of update image data, which is used to prevent loading of firmware updates
[all …]
/Zephyr-latest/soc/native/inf_clock/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
11 int "CPU Number this image targets"
16 Which native simulator microcontroller/CPU number is this image targeting.
33 On a multi MCU device, which MCU is the preferred one.
44 So you can, for ex., use this application build to produce one core image, and at the same time
48 bool "Auto-start this MCU"
51 Automatically start the MCU this Zephyr image is built for during HW boot,
/Zephyr-latest/share/sysbuild/template/
DCMakeLists.txt3 # SPDX-License-Identifier: Apache-2.0
5 # Generic sysbuild CMakeLists.txt file used as sysbuild entry point for multi-image builds.
8 # file to the folder `<app-dir>/sysbuild` and use as a template and extend as needed.
/Zephyr-latest/boards/intel/adl/doc/
Dindex.rst8 Alder Lake processor is a 64-bit multi-core processor built on 10-nanometer
11 Currently supported is N-processor line, Single Chip Platform that consists of
12 the Processor Die and Alder Lake N Platform Controller Hub (ADL-N PCH) Die on
13 the same package as Multi-Chip Package (MCP).
18 Alder Lake N Customer Reference Board (ADL-N CRB) and Alder Lake Reference
19 Validation Platform (ADL-N RVP) are example implementations of compact single
36 Use the following procedures for booting an image for an Alder Lake N CRB board.
49 .. zephyr-app-commands::
50 :zephyr-app: samples/hello_world
56 A Zephyr EFI image file named :file:`zephyr.efi` is automatically
[all …]
/Zephyr-latest/doc/build/sysbuild/
Dindex.rst6 Sysbuild is a higher-level build system that can be used to combine multiple
7 other build systems together. It is a higher-level layer that combines one
27 Single-image build
31 Multi-image build
33 …The word "image" is used because your main goal is usually to generate the binaries of the firmware
39 Multi-domain
50 :figclass: align-center
55 - You can run sysbuild either with :ref:`west build
56 <west-building>` or directly via ``cmake``.
58 - You can use sysbuild to generate application images from each build system,
[all …]
/Zephyr-latest/boards/intel/rpl/doc/
Dindex.rst8 Raptor Lake processor is a 13th generation 64-bit multi-core processor built
9 on a 10-nanometer technology process. Raptor Lake is based on a Hybrid
10 architecture, utilizing P-cores for performance and E-Cores for efficiency.
14 The S-Processor line is a 2-Chip Platform that includes the Processor Die and
15 Platform Controller Hub (PCH-S) Die in the Package.
17 The P-Processor line is a 2-Die Multi Chip Package (MCP) that includes the
18 Processor Die and Platform Controller Hub (PCH-P) Die on the same package as
21 For more information about Raptor Lake Processor lines, P-cores, and E-cores
46 Use the following procedures for booting an image on an RPL CRB board.
59 .. zephyr-app-commands::
[all …]
/Zephyr-latest/doc/introduction/
Dindex.rst6 The Zephyr OS is based on a small-footprint kernel designed for use on
7 resource-constrained and embedded systems: from simple embedded environmental
13 - ARCv2 (EM and HS) and ARCv3 (HS6X)
14 - ARMv6-M, ARMv7-M, and ARMv8-M (Cortex-M)
15 - ARMv7-A and ARMv8-A (Cortex-A, 32- and 64-bit)
16 - ARMv7-R, ARMv8-R (Cortex-R, 32- and 64-bit)
17 - Intel x86 (32- and 64-bit)
18 - MIPS (MIPS32 Release 1 specification)
19 - NIOS II Gen 2
20 - RISC-V (32- and 64-bit)
[all …]
/Zephyr-latest/boards/snps/nsim/arc_classic/doc/
Dindex.rst19 There are multiple supported sub-configurations for that platform. Some but not all of currently
22 * ``nsim/nsim_em`` - ARC EM core v4.0 with two register banks, FastIRQ's, MPUv2, DSP options and
23 XY-memory
24 * ``nsim/nsim_em7d_v22`` - ARC EM core v3.0 with one register bank and FastIRQ's
25 * ``nsim/nsim_em11d`` - ARC EM core v4.0 with one register bank, no FastIRQ's, MPUv2, DSP options a…
26 XY-memory
27 * ``nsim/nsim_sem`` - ARC EM core v4.0 with secure features (thus "SEM", i.e. Secure EM) and MPUv4
28 * ``nsim/nsim_hs`` - ARCv2 HS core v2.1 with two register banks, FastIRQ's and MPUv3
29 * ``nsim/nsim_hs/smp`` - Dual-core ARCv2 HS core v2.1 with two register banks, FastIRQ's and MPUv3
30 * ``nsim/nsim_vpx5`` - ARCv2 VPX5 core, close to vpx5_integer_full template
[all …]
/Zephyr-latest/boards/waveshare/nrf51_ble400/doc/
Dindex.rst6 …rboard designed for BLE Bluetooth 2.4G Wireless Module. Used together with core board -- Core51822.
12 ------------
14 - Onboard battery holder, multi power supplies are available
15 - All the IOs are accessible for easy expansion
16 - Integrates CP2102 for debugging
17 - LEDs and user keys, compatible with other official boards, easy to use
20 ----------
22 - Onboard chip: nRF51822
23 - Communication distance (open outdoor 1M data rate): 30m
24 - Frequency range: 2.4GHz
[all …]
/Zephyr-latest/doc/build/flashing/
Dconfiguration.rst1 .. _flashing-soc-board-config:
7 :ref:`west flash<west-flashing>`) which allows for customising how commands are used when
9 configuring when commands are ran for groups of board targets. As an example: a multi-core SoC
10 might want to only allow the ``--erase`` argument to be used once for all of the cores in the SoC
28 ``--reset`` followed by a list which specifies the settings for each of these commands (these
31 runners, otherwise must contain each runner that it applies to using the runner-specific name.
38 means that the command will be ran once with the first image flashing process per set of board
39 targets, or to ``last`` which will be ran once for the final image flash per set of board targets.
41 An example flashing configuration for a ``soc.yml`` is shown below in which the ``--recover``
46 .. code-block:: yaml
[all …]
/Zephyr-latest/boards/shields/x_nucleo_iks01a1/doc/
Dindex.rst1 .. _x-nucleo-iks01a1:
3 X-NUCLEO-IKS01A1: MEMS Inertial and Environmental Multi sensor shield
8 The X-NUCLEO-IKS01A1 is a motion MEMS and environmental sensor
10 layout. It includes an STMicroelectronics’ LSM6DS0 3-axis accelerometer
11 and 3-axis gyroscope, the LIS3MDL 3-axis magnetometer, the HTS221
14 The X-NUCLEO-IKS01A1 interfaces with the main board via an I2C interface.
16 .. image:: img/x-nucleo-iks01a1.jpg
18 :alt: X-NUCLEO-IKS01A
21 `X-NUCLEO-IKS01A1 website`_.
26 X-NUCLEO-IKS01A1 provides the following key features:
[all …]
/Zephyr-latest/doc/
Dglossary.rst16 The set of user-supplied files that the Zephyr build system uses
17 to build an application image for a specified board configuration.
18 It can contain application-specific code, kernel configuration settings,
25 if it does not require any board-specific capabilities.
27 application image
30 Each application image contains both the application's code and the
32 fully-linked binary.
33 Once an application image is loaded onto a board, the image takes control
43 which can load and execute an application image. It may be an actual
53 specified by the build system can be over-ridden by the application,
[all …]
/Zephyr-latest/doc/develop/west/
Dbuild-flash-debug.rst1 .. _west-build-flash-debug:
6 Zephyr provides several :ref:`west extension commands <west-extensions>` for
11 commands, see :ref:`flash-and-debug-support` in the board porting guide.
13 .. Add a per-page contents at the top of the page. This page is nested
21 .. _west-building:
26 .. tip:: Run ``west build -h`` for a quick overview.
29 use :ref:`west config <west-config-cmd>` to configure its behavior.
33 - If there is a Zephyr build directory named :file:`build` in your current
34 working directory, it is incrementally re-compiled. The same is true if you
37 - Otherwise, if you run ``west build`` from a Zephyr application's source
[all …]
/Zephyr-latest/doc/build/dts/
Ddt-vs-kconfig.rst12 * Use devicetree to describe **hardware** and its **boot-time configuration**.
13 Examples include peripherals on a board, boot-time clock frequencies,
16 image. Examples include whether to add networking support, which drivers are
29 * Additionally, the UART **boot-time configuration** is also described with
32 their boot-time configuration is described in devicetree.
38 As another example, consider a device with a 2.4GHz, multi-protocol radio
43 * **Boot-time configuration** for the radio, such as TX power in dBm, should
51 :ref:`status <dt-important-props>` keyword on the corresponding hardware
56 * Because Kconfig is unable to flexibly control some instance-specific driver
61 e.g. ``zephyr,random-mac-address`` in the common Ethernet devicetree
/Zephyr-latest/scripts/pylib/build_helpers/
Ddomains.py3 # SPDX-License-Identifier: Apache-2.0
21 # The domains.yaml file is a simple list of domains from a multi image build
35 - type: map
47 - type: str
53 formatter = logging.Formatter('%(name)s - %(levelname)s - %(message)s')

12345