Searched +full:mtl +full:- +full:etsalg (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/dts/bindings/ethernet/ |
| D | snps,dwcxgmac.yaml | 2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
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| /Zephyr-latest/drivers/ethernet/dwc_xgmac/ |
| D | eth_dwc_xgmac_priv.h | 7 * SPDX-License-Identifier: Apache-2.0
467 * the EDMA starts pre-fetching the TxDMA descriptors
471 * the EDMA starts pre-fetching the RxDMA descriptors
492 /* Address-Aligned Beats. When this bit is set to 1, the AXI master performs
493 * address-aligned burst transfers on Read and Write channels
496 /* Enhanced Address Mode Enable: e DMA engine uses either the 40- or 48-bit address,
519 * programmed to a non-zero value (when split header feature is not enabled).
561 uint8_t etsalg; member
579 * the MAC Receiver based on the DMA channel number programmed in the L3-L4 filter
590 * blocks of 256 bytes. Range 0 - 63
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| D | eth_dwc_xgmac.c | 4 * SPDX-License-Identifier: Apache-2.0
19 #define UPDATE_ETH_STATS_TX_PKT_CNT(dev_data, incr) (dev_data->stats.pkts.tx += incr)
20 #define UPDATE_ETH_STATS_RX_PKT_CNT(dev_data, incr) (dev_data->stats.pkts.rx += incr)
21 #define UPDATE_ETH_STATS_TX_BYTE_CNT(dev_data, incr) (dev_data->stats.bytes.sent += incr)
22 #define UPDATE_ETH_STATS_RX_BYTE_CNT(dev_data, incr) (dev_data->stats.bytes.received += incr)
23 #define UPDATE_ETH_STATS_TX_ERROR_PKT_CNT(dev_data, incr) (dev_data->stats.errors.tx += incr)
24 #define UPDATE_ETH_STATS_RX_ERROR_PKT_CNT(dev_data, incr) (dev_data->stats.errors.rx += incr)
25 #define UPDATE_ETH_STATS_TX_DROP_PKT_CNT(dev_data, incr) (dev_data->stats.tx_dropped += incr)
37 * @brief Run-time device configuration data structure.
40 * controller instance which is modifiable at run-time, such as
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