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/Zephyr-latest/dts/bindings/pinctrl/
Dgd,gd32-pinctrl-afio.yaml2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined combinations for the SoC variant used by the board */
25 #include <dt-bindings/pinctrl/gd32f403z(k-i-g-e-c-b)xx-pinctrl.h>
39 /* both PA10 and PA12 have pull-up enabled */
40 bias-pull-up;
56 is used for low power states because it disconnects the pin pull-up/down
64 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
67 - drive-push-pull: Push-pull drive mode (default, not required). Only
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/Zephyr-latest/tests/drivers/pinctrl/gd32/boards/
Dgd32f403z_eval.overlay3 * SPDX-License-Identifier: Apache-2.0
10 compatible = "vnd,pinctrl-device";
11 pinctrl-0 = <&test_device_default>;
12 pinctrl-names = "default";
32 drive-push-pull;
36 drive-open-drain;
40 bias-disable;
44 bias-pull-up;
48 bias-pull-down;
52 slew-rate = "max-speed-2mhz";
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/Zephyr-latest/boards/st/nucleo_f429zi/
Dnucleo_f429zi.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f4/stm32f429zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "STMicroelectronics STM32F429ZI-NUCLEO board";
15 compatible = "st,stm32f429zi-nucleo";
19 zephyr,shell-uart = &usart3;
23 zephyr,code-partition = &slot0_partition;
27 compatible = "gpio-leds";
43 compatible = "gpio-keys";
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/Zephyr-latest/drivers/pwm/
Dpwm_led_esp32.c5 * SPDX-License-Identifier: Apache-2.0
10 /* Include esp-idf headers first to avoid redefining BIT() macro */
64 (struct pwm_ledc_esp32_config *) dev->config; in get_channel_config()
66 for (uint8_t i = 0; i < config->channel_len; i++) { in get_channel_config()
67 if (config->channel_config[i].idx == channel_id) { in get_channel_config()
68 return &config->channel_config[i]; in get_channel_config()
76 struct pwm_ledc_esp32_data *data = (struct pwm_ledc_esp32_data *const)(dev)->data; in pwm_led_esp32_low_speed_update()
79 ledc_hal_ls_channel_update(&data->hal, channel); in pwm_led_esp32_low_speed_update()
85 struct pwm_ledc_esp32_data *data = (struct pwm_ledc_esp32_data *const)(dev)->data; in pwm_led_esp32_update_duty()
87 ledc_hal_set_sig_out_en(&data->hal, channel, true); in pwm_led_esp32_update_duty()
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/Zephyr-latest/drivers/sdhc/
Dsdhc_esp32.c4 * SPDX-License-Identifier: Apache-2.0
81 uint32_t bus_clock; /* Value in Hz. ESP-IDF functions use kHz instead */
98 * - one is the clock generator which drives SDMMC peripheral,
99 * it can be configured using sdio_hw->clock register. It can generate
101 * - 4 clock dividers inside SDMMC peripheral, which can divide clock
105 * For cards which aren't UHS-1 or UHS-2 cards, which we don't support,
106 * maximum bus frequency in high speed (HS) mode is 50 MHz.
107 * Note: for non-UHS-1 cards, HS mode is optional.
108 * Default speed (DS) mode is mandatory, it works up to 25 MHz.
114 * The first stage divider is set to the highest possible value for the given
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/Zephyr-latest/drivers/ethernet/
Deth_sam_gmac.c6 * SPDX-License-Identifier: Apache-2.0
12 * This is a zero-copy networking implementation of an Ethernet driver. To
18 * - one shot PHY setup, no support for PHY disconnect/reconnect
19 * - no statistics collection
67 dcache_enabled = (SCB->CCR & SCB_CCR_DC_Msk); in dcache_is_enabled()
76 uint32_t start_addr = addr & (uint32_t)~(GMAC_DCACHE_ALIGNMENT - 1); in dcache_invalidate()
77 uint32_t size_full = size + addr - start_addr; in dcache_invalidate()
89 uint32_t start_addr = addr & (uint32_t)~(GMAC_DCACHE_ALIGNMENT - 1); in dcache_clean()
90 uint32_t size_full = size + addr - start_addr; in dcache_clean()
119 #if CONFIG_NET_BUF_DATA_SIZE * (CONFIG_NET_BUF_RX_COUNT - \
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/Zephyr-latest/doc/releases/
Drelease-notes-2.3.rst18 with future support for features like 64-bit and absolute timeouts in mind
21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant
24 * The CMSIS-DSP library is now included and integrated
33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String
34 into a fixed-size array.
35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS
37 * CVE-2020-10061: Improper handling of the full-buffer case in the
39 * CVE-2020-10062: Packet length decoding error in MQTT
40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due
42 * CVE-2020-10068: In the Zephyr project Bluetooth subsystem, certain
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Drelease-notes-2.6.rst13 * Added support for 64-bit ARCv3
14 * Split ARM32 and ARM64, ARM64 is now a top-level architecture
15 * Added initial support for Arm v8.1-m and Cortex-M55
22 https://github.com/zephyrproject-rtos/example-application
34 * CVE-2021-3581: Under embargo until 2021-09-04
41 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
46 * Driver APIs now return ``-ENOSYS`` if optional functions are not implemented.
47 If the feature is not supported by the hardware ``-ENOTSUP`` will be returned.
48 Formerly ``-ENOTSUP`` was returned for both failure modes, meaning this change
194 * Added support for null pointer dereferencing detection in Cortex-M.
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