Searched +full:load +full:- +full:capacitance +full:- +full:femtofarad (Results 1 – 8 of 8) sorted by relevance
| /Zephyr-latest/dts/bindings/clock/ |
| D | nordic,nrf53-hfxo.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF high-frequency crystal oscillator (nRF53 series)
6 compatible: "nordic,nrf53-hfxo"
8 include: fixed-clock.yaml
11 clock-frequency:
14 load-capacitors:
17 - "internal"
18 - "external"
20 Type of load capacitors connected to the crystal.
22 load-capacitance-femtofarad:
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| D | nordic,nrf-lfxo.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF low-frequency crystal oscillator
6 compatible: "nordic,nrf-lfxo"
8 include: fixed-clock.yaml
11 clock-frequency:
14 load-capacitors:
17 - "internal"
18 - "external"
20 Type of load capacitors connected to the crystal. If not specified,
24 load-capacitance-femtofarad:
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| D | nordic,nrf-hfxo.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Nordic nRF high-frequency crystal oscillator
6 compatible: "nordic,nrf-hfxo"
8 include: fixed-clock.yaml
11 clock-frequency:
14 load-capacitors:
17 - "internal"
18 - "external"
20 Type of load capacitors connected to the crystal. If not specified,
24 load-capacitance-femtofarad:
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| /Zephyr-latest/boards/nordic/nrf54l20pdk/ |
| D | nrf54l20_cpuapp_common.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* This file is common to the secure and non-secure domain */
10 #include "nrf54l20pdk_nrf54l20-common.dtsi"
15 zephyr,shell-uart = &uart20;
16 zephyr,uart-mcumgr = &uart20;
17 zephyr,bt-mon-uart = &uart20;
18 zephyr,bt-c2h-uart = &uart20;
19 zephyr,flash-controller = &rram_controller;
21 zephyr,bt-hci = &bt_hci_controller;
31 load-capacitors = "internal";
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| /Zephyr-latest/boards/nordic/nrf54l15dk/ |
| D | nrf54l_05_10_15_cpuapp_common.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* This file is common to the secure and non-secure domain */
14 zephyr,shell-uart = &uart20;
15 zephyr,uart-mcumgr = &uart20;
16 zephyr,bt-mon-uart = &uart20;
17 zephyr,bt-c2h-uart = &uart20;
18 zephyr,flash-controller = &rram_controller;
29 load-capacitors = "internal";
30 load-capacitance-femtofarad = <15500>;
34 load-capacitors = "internal";
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| /Zephyr-latest/soc/nordic/nrf53/ |
| D | Kconfig | 4 # SPDX-License-Identifier: Apache-2.0
46 default y if "$(dt_node_int_prop_int,$(VREGMAIN_PATH),regulator-initial-mode)" = 1
47 default y if "$(dt_node_int_prop_int,$(VREGRADIO_PATH),regulator-initial-mode)" = 1
83 bool "Pre-tick workaround for nRF5340 anomaly 165"
89 Indicates that the pre-tick workaround for the anomaly 165 that affects
121 regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
135 regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
188 MCU firmware, so when this option is used with the non-secure version of
208 load-capacitors property.
210 Enable the low-frequency oscillator (LFXO) functionality on XL1 and
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| /Zephyr-latest/boards/ezurio/bl5340_dvk/ |
| D | bl5340_dvk_nrf5340_cpuapp_common.dtsi | 2 * Copyright (c) 2019-2023 Nordic Semiconductor ASA
3 * Copyright (c) 2021-2023 Laird Connectivity
5 * SPDX-License-Identifier: Apache-2.0
7 #include "bl5340_dvk_nrf5340_cpuapp_common-pinctrl.dtsi"
8 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 zephyr,shell-uart = &uart0;
14 zephyr,uart-mcumgr = &uart0;
15 zephyr,bt-mon-uart = &uart0;
16 zephyr,bt-c2h-uart = &uart0;
18 zephyr,bt-hci = &bt_hci_ipc0;
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| /Zephyr-latest/doc/releases/ |
| D | migration-guide-4.0.rst | 39 to define default flash and ram partitioning based on TF-M.
60 specify it using the west ``--runner`` or ``-r`` option. (:github:`75284`)
61 * ADC: Domain clock needs to be explicitly defined if property st,adc-clock-source = <ASYNC> is use…
85 Trusted Firmware-M
130 Chip variants with open-drain outputs (``mcp23x09``, ``mcp23x18``) now correctly reflect this in
134 * The ``power-domain`` property has been removed in favor of ``power-domains``.
136 ``power-domain-names`` is also available to optionally name each entry in
137 ``power-domains``. The number of cells in the ``power-domains`` property need
138 to be defined using ``#power-domain-cells``.
143 * For all STM32 ADC that selects an asynchronous clock through ``st,adc-clock-source`` property,
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