| /Zephyr-latest/dts/bindings/sdhc/ |
| D | nxp,imx-usdhc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx-usdhc"
8 include: [sdhc.yaml, pinctrl-device.yaml]
14 data-timeout:
20 read-watermark:
24 Number of words used as read watermark level in FIFO queue for USDHC
26 write-watermark:
30 Number of words used as write watermark level in FIFO queue for USDHC
41 pwr-gpios:
42 type: phandle-array
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| /Zephyr-latest/dts/bindings/mmc/ |
| D | renesas,rcar-emmc.yaml | 1 description: Renesas R-Car eMMC
3 compatible: "renesas,rcar-mmc"
5 include: [sdhc.yaml, mmc.yaml, pinctrl-device.yaml, reset-device.yaml]
14 pinctrl-0:
17 pinctrl-names:
20 max-bus-freq:
23 non-removable:
26 Non-removable slots (like eMMC), which are assumed to always be present,
30 mmc-sdr104-support:
33 cd-gpios:
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| /Zephyr-latest/boards/digilent/arty_a7/dts/bindings/ |
| D | arm,daplink-qspi-mux.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "arm,daplink-qspi-mux"
14 IRQ line connected to the level-detect non-interrupt DAPLink shield
17 mux-gpios:
18 type: phandle-array
|
| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | ti,cc13xx-cc26xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
29 - drive-strength: Minimum current that can be sourced from the pin.
30 - input-enable: enable input.
31 - input-schmitt-enable: enable input schmitt circuit.
32 - ti,input-edge-detect: enable and configure edge detection interrupts
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| /Zephyr-latest/dts/bindings/stepper/adi/ |
| D | adi,trinamic-stallguard.yaml | 1 # SPDX-FileCopyrightText: Copyright (c) 2024 Carl Zeiss Meditec AG
2 # SPDX-License-Identifier: Apache-2.0
7 activate-stallguard2:
12 stallguard2-threshold:
16 This signed value controls StallGuard2 level for stall output and sets the
20 -64 to +63: A higher value makes StallGuard2 less sensitive and requires more torque
23 stallguard-threshold-velocity:
27 Threshold velocity for StallGuard2 to detect a stall event.
30 stallguard-velocity-check-interval-ms:
34 Stallguard should not be enabled during motor spin-up.
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| /Zephyr-latest/drivers/ethernet/phy/ |
| D | Kconfig | 3 # Copyright (c) 2021 IP-Logix Inc.
4 # SPDX-License-Identifier: Apache-2.0
13 module-dep = LOG
14 module-str = Log level for Ethernet PHY driver
15 module-help = Sets log level for Ethernet PHY Device Drivers.
27 so that it can start before the networking sub-system.
67 depends on GPIO || (!$(dt_compat_any_has_prop,$(DT_COMPAT_REALTEK_RTL8211F),reset-gpios) && \
68 !$(dt_compat_any_has_prop,$(DT_COMPAT_REALTEK_RTL8211F),int-gpios))
81 int "Auto-negotiation timeout value in milliseconds"
84 Maximum duration of auto-negotiation sequence in milliseconds
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| /Zephyr-latest/include/zephyr/drivers/usb_c/ |
| D | usbc_tc.h | 3 * SPDX-License-Identifier: Apache-2.0
8 * @brief USB Type-C Cable and Connector API used for USB-C drivers
10 * The information in this file was taken from the USB Type-C
18 * @brief USB Type-C
19 * @defgroup usb_type_c USB Type-C
32 * See Table 4-3 VBUS Sink Characteristics
38 * See Table 4-3 VBUS Sink Characteristics
45 * See Table 4-29 VBUS and VCONN Timing Parameters
52 * See Table 4-29 VBUS and VCONN Timing Parameters
58 * See Table 4-29 VBUS and VCONN Timing Parameters
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| /Zephyr-latest/boards/digilent/arty_a7/ |
| D | board.c | 4 * SPDX-License-Identifier: Apache-2.0
35 return -EINVAL; in board_daplink_qspi_mux_select()
40 return -EINVAL; in board_daplink_qspi_mux_select()
57 * level-detect non-interrupt signal to determine if the DAPLink shield in board_daplink_is_fitted()
68 * in which case the CPU will have the off-board QSPI NOR flash in board_init()
69 * memory-mapped at 0x0. in board_init()
|
| /Zephyr-latest/cmake/toolchain/cross-compile/ |
| D | target.cmake | 1 # SPDX-License-Identifier: Apache-2.0
4 # When using cross-compile, the generic toolchain will be identical to the
6 # Some gcc based compilers do have this information built-in.
7 execute_process(COMMAND ${CMAKE_C_COMPILER} --print-sysroot
31 if(${index} EQUAL -1)
37 # We detect the lib folders, the actual sysroot is up one level.
46 "Use `-DSYSROOT_DIR=<sysroot-dir>` to select sysroot.\n"
60 "Use `-DSYSROOT_DIR=<sysroot-dir>` to specify sysroot to use.\n"
|
| /Zephyr-latest/scripts/build/ |
| D | check_init_priorities.py | 4 # SPDX-License-Identifier: Apache-2.0
13 This can be used to detect devices that are initialized in the incorrect order,
33 "dts", "python-devicetree", "src"))
34 from devicetree import edtlib # pylint: disable=unused-import
40 # Defined init level in order of priority.
49 "zephyr,cdc-acm-uart",
60 def __init__(self, level, priority): argument
62 if level_name == level:
69 raise ValueError("Unknown level in %s" % level)
96 class variables in the {"level name": ["call", ...]} format.
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| /Zephyr-latest/subsys/shell/backends/ |
| D | shell_rtt.c | 4 * SPDX-License-Identifier: Apache-2.0
42 sh_rtt->handler(SHELL_TRANSPORT_EVT_RX_RDY, sh_rtt->context); in timer_handler()
51 struct shell_rtt *sh_rtt = (struct shell_rtt *)transport->ctx; in init()
53 sh_rtt->handler = evt_handler; in init()
54 sh_rtt->context = context; in init()
56 k_timer_init(&sh_rtt->timer, timer_handler, NULL); in init()
57 k_timer_user_data_set(&sh_rtt->timer, (void *)sh_rtt); in init()
58 k_timer_start(&sh_rtt->timer, K_MSEC(CONFIG_SHELL_RTT_RX_POLL_PERIOD), in init()
76 struct shell_rtt *sh_rtt = (struct shell_rtt *)transport->ctx; in uninit()
78 k_timer_stop(&sh_rtt->timer); in uninit()
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| /Zephyr-latest/subsys/usb/usb_c/ |
| D | usbc_tc_src_states.c | 4 * SPDX-License-Identifier: Apache-2.0
17 * When in the Unattached.SRC state, the port is waiting to detect the
38 const struct device *dev = tc->dev; in tc_unattached_src_run()
47 if (tcpc_is_cc_at_least_one_rd(tc->cc1, tc->cc2)) { in tc_unattached_src_run()
74 const struct device *dev = tc->dev; in tc_unattached_wait_src_entry()
75 struct usbc_port_data *data = dev->data; in tc_unattached_wait_src_entry()
76 const struct device *tcpc = data->tcpc; in tc_unattached_wait_src_entry()
84 usbc_timer_start(&tc->tc_t_vconn_off); in tc_unattached_wait_src_entry()
90 const struct device *dev = tc->dev; in tc_unattached_wait_src_run()
93 if (usbc_timer_expired(&tc->tc_t_vconn_off)) { in tc_unattached_wait_src_run()
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| /Zephyr-latest/doc/kernel/services/other/ |
| D | fatal.rst | 10 either build-time checks, conditionally compiled assertions, or deliberately
21 non-zero value. There are two ways to do this:
23 - Use the :kconfig:option:`CONFIG_ASSERT` and :kconfig:option:`CONFIG_ASSERT_LEVEL` kconfig
25 - Add ``-D__ASSERT_ON=<level>`` to the project's CFLAGS, either on the
31 Specifying an assertion level of 1 causes the compiler to issue warnings that
32 the kernel contains debug-type ``__ASSERT()`` statements; this reminder is
34 Specifying assertion level 2 suppresses these warnings.
46 ----------
57 .. code-block:: c
64 .. code-block:: none
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | spi.h | 4 * SPDX-License-Identifier: Apache-2.0
27 #include <zephyr/dt-bindings/spi/spi.h>
73 * Whatever data is transmitted is looped-back to the receiving buffer of
115 /** Requests - if possible - to keep CS asserted after the transaction */
187 * cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
190 * a: spi-dev-a@0 {
194 * b: spi-dev-b@1 {
241 * cs-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
242 * spidev: spi-device@0 { ... };
309 * - 0: Master or slave.
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| D | charger.h | 4 * SPDX-License-Identifier: Apache-2.0
75 * level and timing
82 * current level and timing
107 * Reserved to demark downstream custom properties - use this value as the actual value may
217 /** The charger device does not detect a battery */
225 /** Most severe level, typically triggered instantaneously */
227 /** More severe than the warning level, less severe than peak */
229 /** Base severity level */
355 const struct charger_driver_api *api = (const struct charger_driver_api *)dev->api; in z_impl_charger_get_prop()
357 return api->get_property(dev, prop, val); in z_impl_charger_get_prop()
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| /Zephyr-latest/arch/ |
| D | Kconfig | 3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
6 # SPDX-License-Identifier: Apache-2.0
18 # Should be 'select'ed by low-level symbols like SOC_SERIES_* or, lacking that,
37 # is really only necessary for Cortex-M with ARM MPU!
172 Helper symbol to detect SoCs forgetting to select one of the arch
173 symbols above. See the top-level CMakeLists.txt.
180 module-str = arch
186 This option tells the build system that the target system is big-endian.
187 Little-endian architecture is the default and should leave this option
195 # Hidden Kconfig option representing the default little-endian architecture
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| /Zephyr-latest/doc/kernel/services/smp/ |
| D | smp.rst | 26 non-Zephyr code).
31 At the application level, core Zephyr IPC and synchronization
36 At the lowest level, however, Zephyr code has often used the
54 on top of the pre-existing :c:struct:`atomic_` layer (itself usually
65 re-acquire it or it will deadlock (it is perfectly legal to nest
67 detect and report bugs like this.
71 recursive semantics above, spinlocks in single-CPU contexts produce
85 and that it is re-acquired when necessary to restore the lock state
109 :c:func:`k_thread_cpu_mask_enable` will re-enable execution. There are also
113 suspended, otherwise an ``-EINVAL`` will be returned.
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| /Zephyr-latest/drivers/serial/ |
| D | uart_pl011_registers.h | 6 * SPDX-License-Identifier: Apache-2.0
45 #define PL011_BIT_MASK(x, y) (((2 << x) - 1) << y)
48 #define PL011_FR_CTS BIT(0) /* clear to send - inverted */
49 #define PL011_FR_DSR BIT(1) /* data set ready - inverted */
50 #define PL011_FR_DCD BIT(2) /* data carrier detect - inverted */
56 #define PL011_FR_RI BIT(8) /* ring indicator - inverted */
84 #define PL011_LCRH_WLEN_SIZE(x) (x - 5)
108 /* PL011 Control Register - vendor-specific fields */
118 /* PL011 Interrupt Fifo Level Select Register */
|
| /Zephyr-latest/include/zephyr/logging/ |
| D | log_msg.h | 4 * SPDX-License-Identifier: Apache-2.0
59 uint32_t level:3; member
91 (Z_LOG_MSG_ALIGNMENT - (sizeof(struct log_msg_hdr) % Z_LOG_MSG_ALIGNMENT)) : \
154 .level = (_level), \
222 * With Zephyr SDK 0.14.2, aarch64-zephyr-elf-gcc (10.3.0) fails to ensure $sp
256 * - 32 bit platform
257 * - Number of arguments from 0 to 2
258 * - Type of an argument must be a numeric value that fits in 32 bit word.
307 * @param _level Severity level.
320 * @param _level Severity level.
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| /Zephyr-latest/drivers/timer/ |
| D | mtk_adsp_timer.c | 2 * SPDX-License-Identifier: Apache-2.0
25 * which is a 13 MHz 64 bit up-counter. But timeout interrupts are
26 * delivered by ostimers[0], which is a 32 bit (!) down-counter (!!)
28 * slaved the same underlying clock -- they don't skew relative to
72 #define MAX_TICKS ((0xffffffffU - OST_PER_TICK) / OST_PER_TICK)
73 #define CYC64_MAX (0xffffffff - OST64_PER_TICK)
101 uint64_t end = now + CLAMP(ticks - 1, 0, MAX_TICKS) * OST64_PER_TICK; in sys_clock_set_timeout()
102 uint32_t dt = (uint32_t)MIN(end - last_announce, CYC64_MAX); in sys_clock_set_timeout()
105 dt = ((dt + OST64_PER_TICK - 1) / OST64_PER_TICK) * OST64_PER_TICK; in sys_clock_set_timeout()
108 uint32_t cyc = 2 * (dt - (uint32_t)(now - last_announce)); in sys_clock_set_timeout()
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| /Zephyr-latest/soc/nxp/mcx/mcxw/ |
| D | soc.c | 2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
53 /* Re-enable monitor */ in clock_init()
98 /* OSC-RF / System Oscillator Configuration */ in clock_init()
105 /* Init OSC-RF / SOSC */ in clock_init()
192 /* Write 1 to Clear POR detect status bit. in vbat_init()
200 base->STATUSA |= VBAT_STATUSA_POR_DET_MASK; in vbat_init()
205 unsigned int oldLevel; /* old interrupt lock level */ in soc_early_init_hook()
|
| /Zephyr-latest/include/zephyr/net/ |
| D | mdio.h | 4 * SPDX-License-Identifier: Apache-2.0
42 /** IEEE 802.3 45.3.4 post-read-increment-address operation */
62 /** Auto-negotiation */
104 /* Auto-negotiation Register: EEE advertisement Register */
108 /* BASE-T1 registers */
109 /** BASE-T1 Auto-negotiation control */
111 /** BASE-T1 Auto-negotiation status */
113 /** BASE-T1 Auto-negotiation advertisement register [15:0] */
115 /** BASE-T1 Auto-negotiation advertisement register [31:16] */
117 /** BASE-T1 Auto-negotiation advertisement register [47:32] */
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| /Zephyr-latest/arch/arm/include/cortex_m/ |
| D | exception.h | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Exception/interrupt context helpers for Cortex-M CPUs
43 * It is used to perform an exception return and to detect possible state
68 * integer only stack frame or an extended floating-point stack frame.
82 /* bit[6]: Secure or Non-secure stack. Indicates whether a Secure or
83 * Non-secure stack is used to restore stack frame on exception return.
108 * - The function shall only be called from ISR context.
109 * - We do not use ARM processor state flags to determine
121 return (esf->basic.xpsr & IPSR_ISR_Msk) ? (true) : (false); in arch_is_in_nested_exception()
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_asm2_s.h | 4 * SPDX-License-Identifier: Apache-2.0
27 * A0-A15) to their ABI-defined spill regions on the stack.
35 * and repeats until all but the A0-A3 registers of the original frame
39 * - Vastly smaller code size
41 * - More easily maintained if changes are needed to window over/underflow
44 * - Requires no scratch registers to do its work, so can be used safely in any
47 * - If the WOE bit is not enabled (for example, in code written for
50 * - In memory protection situations, this relies on the existing
57 * - Hilariously it's ACTUALLY FASTER than the HAL routine. And not
59 * file on an LX6 core (ESP-32) I'm measuring 145 cycles to spill
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| /Zephyr-latest/doc/security/ |
| D | security-overview.rst | 1 .. _security-overview:
14 documents are created, this document is a top-level overview and entry
32 relevant sub-modules is created, threats are identified, and
43 .. figure:: media/security-process-steps.png
64 noted in RFC-2119, "These terms are frequently used to specify behavior
98 - **Security** **Functionality** with a focus on cryptographic
104 - **Quality Assurance** is driven by using a development process that
107 blocks such as network stacks increases the overall quality level
111 - **Execution Protection** including thread separation, stack and
150 thread execution level, and memory protection constraints are enforced
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