Searched full:lcd_cam (Results 1 – 9 of 9) sorted by relevance
19 #define CAM_LL_GET_HW(id) (((id) == 0) ? (&LCD_CAM) : NULL)65 LCD_CAM.lcd_clock.clk_en = en; in cam_ll_enable_clk()80 return LCD_CAM.lcd_clock.clk_en; in cam_ll_get_clk_status()97 LCD_CAM.cam_ctrl.cam_clk_sel = 3; in cam_ll_select_clk_src()100 LCD_CAM.cam_ctrl.cam_clk_sel = 2; in cam_ll_select_clk_src()103 LCD_CAM.cam_ctrl.cam_clk_sel = 1; in cam_ll_select_clk_src()107 LCD_CAM.cam_ctrl.cam_clk_sel = 0; in cam_ll_select_clk_src()125 switch (LCD_CAM.cam_ctrl.cam_clk_sel) { in cam_ll_get_clk_src()155 HAL_FORCE_MODIFY_U32_REG_FIELD(LCD_CAM.cam_ctrl, cam_clkm_div_num, div_num); in cam_ll_set_group_clock_coeff()156 LCD_CAM.cam_ctrl.cam_clkm_div_a = div_a; in cam_ll_set_group_clock_coeff()[all …]
21 #define LCD_LL_GET_HW(id) (((id) == 0) ? (&LCD_CAM) : NULL)
45 PROVIDE ( LCD_CAM = 0x60041000 ); symbol
33 [24] = "LCD_CAM",
175 …pheral for Rx channel 0. 0:SPI2. 1: SPI3. 2: UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. …335 …pheral for Tx channel 0. 0:SPI2. 1: SPI3. 2: UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. …
747 * LCD_CAM version control register785 extern lcd_cam_dev_t LCD_CAM;
558 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/1041 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE1591 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/2074 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE2624 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/3107 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE3657 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/4140 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE4690 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT..*/5173 UHCI0. 3: I2S0. 4: I2S1. 5: LCD_CAM. 6: AES. 7: SHA. 8: ADC_DAC. 9: RMT.; 7: AE
1039 * LCD_CAM version control register
436 lcd_cam:
