Home
last modified time | relevance | path

Searched +full:i3c +full:- +full:scl +full:- +full:hz (Results 1 – 18 of 18) sorted by relevance

/Zephyr-latest/dts/bindings/i3c/
Di3c-controller.yaml3 # SPDX-License-Identifier: Apache-2.0
5 # Fields for I3C Controllers
9 bus: [i3c, i2c]
12 "#address-cells":
16 "#size-cells":
20 i3c-scl-hz:
23 Frequency of the SCL signal used for I3C transfers. When undefined,
24 use the controller default or as specified by the I3C specification.
26 i2c-scl-hz:
29 Frequency of the SCL signal used for I2C transfers. When undefined
Dnuvoton,npcx-i3c.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Nuvoton I3C controller
11 clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */
12 core-prescaler = <3>; /* CORE_CLK runs at 30MHz */
13 apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */
14 apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */
15 apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */
16 apb4-prescaler = <3>; /* APB4_CLK runs at 30MHz */
26 /* I3C clock frequency suggestion = <PP_SCL, OD_SCL> */
30 i3c-scl-hz = <12500000>;
[all …]
Dnxp,mcux-i3c.yaml4 # SPDX-License-Identifier: Apache-2.0
6 description: NXP MCUX I3C controller
8 compatible: "nxp,mcux-i3c"
10 include: [i3c-controller.yaml, pinctrl-device.yaml]
19 i3c-od-scl-hz:
22 Open Drain Frequency for the I3C controller. When undefined, use
23 the controller default or as specified by the I3C specification.
25 clk-divider:
27 description: Main clock divider for I3C
30 clk-divider-tc:
[all …]
/Zephyr-latest/samples/sensor/thermometer/boards/
Dfrdm_mcxn947_mcxn947_cpu0.overlay4 * SPDX-License-Identifier: Apache-2.0
11 ambient-temp0 = &p3t1755;
18 i2c-scl-hz = <DT_FREQ_K(400)>;
19 i3c-scl-hz = <DT_FREQ_M(4)>;
20 i3c-od-scl-hz = <DT_FREQ_K(1500)>;
Dfrdm_mcxn947_mcxn947_cpu0_qspi.overlay4 * SPDX-License-Identifier: Apache-2.0
11 ambient-temp0 = &p3t1755;
18 i2c-scl-hz = <DT_FREQ_K(400)>;
19 i3c-scl-hz = <DT_FREQ_M(4)>;
20 i3c-od-scl-hz = <DT_FREQ_K(1500)>;
/Zephyr-latest/samples/sensor/lps22hh_i3c/boards/
Dmimxrt685_evk_mimxrt685s_cm33.overlay10 i2c-scl-hz = <400000>;
11 i3c-scl-hz = <400000>;
12 i3c-od-scl-hz = <400000>;
14 clk-divider = <12>;
15 clk-divider-slow = <1>;
16 clk-divider-tc = <1>;
/Zephyr-latest/samples/sensor/lsm6dso_i2c_on_i3c/boards/
Dmimxrt685_evk_mimxrt685s_cm33.overlay10 i2c-scl-hz = <400000>;
11 i3c-scl-hz = <400000>;
12 i3c-od-scl-hz = <400000>;
14 clk-divider = <12>;
15 clk-divider-slow = <1>;
16 clk-divider-tc = <1>;
/Zephyr-latest/boards/shields/p3t1755dp_ard_i3c/boards/
Dmimxrt1180_evk_mimxrt1189_cm33.overlay4 * SPDX-License-Identifier: Apache-2.0
9 * the MIMXRT1180-EVK board, and the J13 on the shield board is connected
11 * J13-1 -> J50-1; J13-2 -> J50-2;
12 * J13-3 -> J50-3; J13-4 -> J50-4;
24 i2c-scl-hz = <DT_FREQ_K(400)>;
25 i3c-scl-hz = <DT_FREQ_K(400)>;
26 i3c-od-scl-hz = <DT_FREQ_K(100)>;
Dmimxrt1180_evk_mimxrt1189_cm7.overlay4 * SPDX-License-Identifier: Apache-2.0
9 * the MIMXRT1180-EVK board, and the J13 on the shield board is connected
11 * J13-1 -> J50-1; J13-2 -> J50-2;
12 * J13-3 -> J50-3; J13-4 -> J50-4;
24 i2c-scl-hz = <DT_FREQ_K(400)>;
25 i3c-scl-hz = <DT_FREQ_K(400)>;
26 i3c-od-scl-hz = <DT_FREQ_K(100)>;
/Zephyr-latest/tests/drivers/build_all/i3c/boards/
Dqemu_cortex_m3.overlay4 * SPDX-License-Identifier: Apache-2.0
8 i3c0: i3c@88888888 {
9 compatible = "cdns,i3c";
10 #address-cells = <3>;
11 #size-cells = <0>;
13 interrupt-parent = <&nvic>;
15 input-clock-frequency = <200000000>;
16 i3c-scl-hz = <12500000>;
17 i2c-scl-hz = <400000>;
/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst3 Improved Inter-Integrated Circuit (I3C) Bus
6 I3C (Improved Inter-Integrated Circuit) is a two-signal shared
12 Currently, the API is based on `I3C Specification`_ version 1.1.1.
18 .. _i3c-controller-api:
20 I3C Controller API
23 Zephyr's I3C controller API is used when an I3C controller controls
25 This is the most common mode, used to interact with I3C target
28 Due to the nature of the I3C, there are devices on the bus where
30 dynamic address assignment needs to be carried out by the I3C
34 for both I3C and I\ :sup:`2`\ C devices:
[all …]
/Zephyr-latest/samples/sensor/lps22hh_i3c/
DREADME.rst1 .. zephyr:code-sample:: lps22hh_i3c
2 :name: LPSS22HH Temperature and Pressure Sensor (I3C)
3 :relevant-api: sensor_interface
5 Get pressure and temperature data from an LPS22HH sensor over I3C (polling &
16 This sample uses the LPS22HH sensor controlled using the I3C interface.
18 STEVALMKI192-V1 connected to the I3C header on :zephyr:board:`mimxrt685_evk`.
23 - LPS22HH: https://www.st.com/en/mems-and-sensors/lps22hh.html
29 sensor (for example, the one on evaluation board STEVALMKI192-V1).
34 I3C In-Band Interrupt (IBI) to signal new data being available.
35 Since IBI is initiated by the sensor, it will take over the I3C
[all …]
/Zephyr-latest/samples/sensor/lsm6dso_i2c_on_i3c/
DREADME.rst1 .. zephyr:code-sample:: lsmd6dso_i2c_on_i3c
2 :name: LSM6DSO IMU sensor (I2C on I3C bus)
3 :relevant-api: sensor_interface
5 Get accelerometer and gyroscope data from an LSM6DSO sensor using I2C on I3C
11 12.5Hz and enables a trigger on data ready. It displays on the console
18 exposed by the I3C controller. It has been tested using the LSM6DSO on
19 the evaluation board STEVAL-MKI196V1 connected to the I3C header
25 - LSM6DSO https://www.st.com/en/mems-and-sensors/lsm6dso.html
31 sensor (for example, the one on evaluation board STEVAL-MKI196V1).
36 .. zephyr-app-commands::
[all …]
/Zephyr-latest/include/zephyr/drivers/
Di3c.h5 * SPDX-License-Identifier: Apache-2.0
12 * @brief I3C Interface
13 * @defgroup i3c_interface I3C Interface
25 #include <zephyr/drivers/i3c/addresses.h>
26 #include <zephyr/drivers/i3c/ccc.h>
27 #include <zephyr/drivers/i3c/devicetree.h>
28 #include <zephyr/drivers/i3c/ibi.h>
42 * - BCR[7:6]: Device Role
43 * - 0: I3C Target
44 * - 1: I3C Controller capable
[all …]
/Zephyr-latest/drivers/i3c/
Di3c_mcux.c6 * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/drivers/i3c.h>
69 /** Common I3C Driver Config */
92 /** Common I3C Driver Data */
101 /** I3C open drain clock frequency in Hz. */
129 * @param reg Pointer to 32-bit Register.
135 * @retval -ETIMEDOUT Timedout without matching.
143 * quickly (some sub-microseconds) so no extra in reg32_poll_timeout()
147 return -ETIMEDOUT; in reg32_poll_timeout()
155 * @param reg Pointer to 32-bit Register.
[all …]
Di3c_npcx.c4 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/drivers/i3c.h>
18 #include <zephyr/drivers/i3c/target_device.h>
103 #define I3C_BUS_TLOW_PP_MIN_NS 24 /* T_LOW period in push-pull mode */
104 #define I3C_BUS_THigh_PP_MIN_NS 24 /* T_High period in push-pull mode */
105 #define I3C_BUS_TLOW_OD_MIN_NS 200 /* T_LOW period in open-drain mode */
107 #define PPBAUD_DIV_MAX (BIT(GET_FIELD_SZ(NPCX_I3C_MCONFIG_PPBAUD)) - 1) /* PPBAUD divider max */
115 /* Default maximum time we allow for an I3C transfer */
133 /* I3C moudle and port parsing from instance_id */
137 /* I3C target PID parsing */
[all …]
/Zephyr-latest/boards/st/nucleo_h563zi/
Dnucleo_h563zi-common.dtsi5 * SPDX-License-Identifier: Apache-2.0
9 #include <st/h5/stm32h563zitx-pinctrl.dtsi>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "gpio-leds";
32 compatible = "gpio-keys";
41 compatible = "pwm-leds";
52 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
53 hse-bypass;
66 div-m = <2>;
67 mul-n = <120>;
[all …]
/Zephyr-latest/doc/releases/
Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
[all …]