| /Zephyr-latest/dts/arm/xilinx/ |
| D | zynqmp.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-r.dtsi>
9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/ethernet/xlnx_gem.h>
16 compatible = "xlnx,pinctrl-zynqmp";
19 compatible = "soc-nv-flash";
24 compatible = "mmio-sram";
29 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
31 zephyr,memory-region = "OCM";
40 interrupt-names = "irq_0";
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| D | zynq7000.dtsi | 3 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-a.dtsi>
8 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
9 #include <zephyr/dt-bindings/ethernet/xlnx_gem.h>
13 interrupt-parent = <&gic>;
16 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
18 zephyr,memory-region = "OCM_LOW";
22 compatible = "zephyr,memory-region", "xlnx,zynq-ocm";
24 zephyr,memory-region = "OCM_HIGH";
28 compatible = "arm,armv8-timer";
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| /Zephyr-latest/dts/bindings/ethernet/ |
| D | xlnx,gem.yaml | 3 # SPDX-License-Identifier: Apache-2.0
10 include: ethernet-controller.yaml
19 clock-frequency:
27 which it will be adjusted at run-time. Therefore, the value of this
29 respective GEM's TX clock - by default, this is the IO PLL.
31 mdc-divider:
42 init-mdio-phy:
45 Activates the management of a PHY associated with the controller in-
46 stance. If this parameter is activated at the board level, the de-
47 fault values of the associated parameters mdio-phy-address, phy-poll-
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| /Zephyr-latest/drivers/video/ |
| D | video_esp32_dvp.c | 5 * SPDX-License-Identifier: Apache-2.0
31 if (data->signal_out) { \
32 k_poll_signal_raise(data->signal_out, result); \
78 const struct video_esp32_config *cfg = data->config; in video_esp32_reload_dma()
81 if (data->active_vbuf == NULL) { in video_esp32_reload_dma()
82 LOG_ERR("No video buffer available. Enqueue some buffers first."); in video_esp32_reload_dma()
83 return -EAGAIN; in video_esp32_reload_dma()
86 ret = dma_reload(cfg->dma_dev, cfg->rx_dma_channel, 0, (uint32_t)data->active_vbuf->buffer, in video_esp32_reload_dma()
87 data->active_vbuf->bytesused); in video_esp32_reload_dma()
93 ret = dma_start(cfg->dma_dev, cfg->rx_dma_channel); in video_esp32_reload_dma()
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| /Zephyr-latest/drivers/spi/ |
| D | spi_esp32_spim.c | 4 * SPDX-License-Identifier: Apache-2.0
9 /* Include esp-idf headers first to avoid redefining BIT() macro */
46 return spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx); in spi_esp32_transfer_ongoing()
58 spi_context_cs_control(&data->ctx, false); in spi_esp32_complete()
61 spi_context_complete(&data->ctx, dev, status); in spi_esp32_complete()
68 struct spi_esp32_data *data = dev->data; in spi_esp32_transfer()
69 const struct spi_esp32_config *cfg = dev->config; in spi_esp32_transfer()
70 struct spi_context *ctx = &data->ctx; in spi_esp32_transfer()
71 spi_hal_context_t *hal = &data->hal; in spi_esp32_transfer()
72 spi_hal_dev_config_t *hal_dev = &data->dev_config; in spi_esp32_transfer()
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| D | spi_max32.c | 4 * SPDX-License-Identifier: Apache-2.0
86 const struct max32_spi_config *cfg = dev->config; in spi_configure()
87 mxc_spi_regs_t *regs = cfg->regs; in spi_configure()
88 struct max32_spi_data *data = dev->data; in spi_configure()
90 if (spi_context_configured(&data->ctx, config)) { in spi_configure()
94 if (SPI_OP_MODE_GET(config->operation) & SPI_OP_MODE_SLAVE) { in spi_configure()
95 return -ENOTSUP; in spi_configure()
101 int ss_polarity = (config->operation & SPI_CS_ACTIVE_HIGH) ? 1 : 0; in spi_configure()
102 unsigned int spi_speed = (unsigned int)config->frequency; in spi_configure()
109 int cpol = (SPI_MODE_GET(config->operation) & SPI_MODE_CPOL) ? 1 : 0; in spi_configure()
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_cyclonev_priv.h | 4 * SPDX-License-Identifier: Apache-2.0
8 * 3504-0 Universal 10/100/1000 Ethernet MAC (DWC_gmac)
40 uint32_t feature; /* HW feature register */
41 /* Tx/Rx Descriptor Rings */
44 uint32_t txints; /* Rx stats */
45 uint8_t rx_buf[ETH_BUFFER_SIZE * NB_RX_DESCS]; /* Receive Buffer */
46 uint8_t tx_buf[ETH_BUFFER_SIZE * NB_TX_DESCS]; /* Transmit Buffer */
59 /* The byte offset of the ALT_RSTMGR_PERMODRST register from the beginning of
77 /* The byte offset of the SYSMGR_EMAC register from the beginning of the
81 /* The byte offset of the SYSMGR_FPGAINTF_INDIV register from the beginning of
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| D | eth_xlnx_gem.c | 5 * SPDX-License-Identifier: Apache-2.0
8 * - Only supports 32-bit addresses in buffer descriptors, therefore
9 * the ZynqMP APU (Cortex-A53 cores) may not be fully supported.
10 * - Hardware timestamps not considered.
11 * - VLAN tags not considered.
12 * - Wake-on-LAN interrupt not supported.
13 * - Send function is not SMP-capable (due to single TX done semaphore).
14 * - Interrupt-driven PHY management not supported - polling only.
15 * - No explicit placement of the DMA memory area(s) in either a
18 * with the Cortex-R5 QEMU target or an actual R5 running without the
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| D | eth_dwmac.c | 6 * SPDX-License-Identifier: Apache-2.0
27 * This driver references network data fragments with a zero-copy approach.
29 * offset in memory, the gap bytes in the first word will be overwritten,
30 * and subsequent fragments have to be buswidth-aligned anyway.
38 /* size of pre-allocated packet fragments */
51 #define DEC_WRAP(idx, size) ({ idx = (idx + size - 1) % size; })
59 #define TXDESC_PHYS_H(idx) hi32(p->tx_descs_phys + (idx) * sizeof(struct dwmac_dma_desc))
60 #define TXDESC_PHYS_L(idx) lo32(p->tx_descs_phys + (idx) * sizeof(struct dwmac_dma_desc))
61 #define RXDESC_PHYS_H(idx) hi32(p->rx_descs_phys + (idx) * sizeof(struct dwmac_dma_desc))
62 #define RXDESC_PHYS_L(idx) lo32(p->rx_descs_phys + (idx) * sizeof(struct dwmac_dma_desc))
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| D | eth_cyclonev.c | 2 * SPDX-License-Identifier: Apache-2.0
5 * 3504-0 Universal 10/100/1000 Ethernet MAC (DWC_gmac)
9 * https://github.com/altera-opensource/intel-socfpga-hwlib
71 * /us/en/pdfs/literature/hb/cyclone-v/cv_54001.pdf p. 1252
135 sys_write32(tmpreg, EMAC_GMAC_MAC_ADDR_HIGH_ADDR(p->base_addr, n)); in eth_cyclonev_set_mac_addr()
142 sys_write32(tmpreg, EMAC_GMAC_MAC_ADDR_LOW_ADDR(p->base_addr, n)); in eth_cyclonev_set_mac_addr()
156 return -1; in eth_cyclonev_get_software_reset_status()
158 return EMAC_DMA_MODE_SWR_GET(sys_read32(EMAC_DMAGRP_BUS_MODE_ADDR(p->base_addr))); in eth_cyclonev_get_software_reset_status()
167 * @retval 0 if Reset was successful, -1 otherwise
175 return -1; in eth_cyclonev_software_reset()
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| /Zephyr-latest/drivers/serial/ |
| D | uart_nrfx_uarte.c | 2 * Copyright (c) 2018-2021 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
72 /* Determine if any instance is using asynchronous API with HW byte counting. */
90 /* Driver supports case when all or none instances support that HW feature. */
136 * RX timeout is divided into time slabs, this define tells how many divisions
137 * should be made. More divisions - higher timeout accuracy and processor usage.
141 /* Size of hardware fifo in RX path. */
165 size_t offset; member
183 /* Flag to ensure that RX timeout won't be executed during ENDRX ISR */
194 struct uarte_async_rx rx; member
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| D | uart_nrfx_uart.c | 2 * Copyright (c) 2016-2019 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
117 * @retval -EINVAL for invalid baudrate.
192 return -EINVAL; in baudrate_set()
206 * @return 0 if a character arrived, -1 if the input buffer if empty.
212 return -1; in uart_nrfx_poll_in()
248 * return -EBUSY during poll_out. in uart_nrfx_poll_out()
271 if (--safety_cnt == 0) { in uart_nrfx_poll_out()
311 struct uart_nrfx_data *data = dev->data; in uart_nrfx_configure()
315 switch (cfg->stop_bits) { in uart_nrfx_configure()
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| /Zephyr-latest/drivers/ieee802154/ |
| D | ieee802154_dw1000.c | 4 * SPDX-License-Identifier: Apache-2.0
78 uint8_t rx_shr_code; /* RX SHR preamble code */
79 uint8_t rx_ns_sfd; /* non-standard SFD */
81 * (tx_shr_nsync + 1 + SFD_length - rx_pac_l)
136 .rx_sfd_to = (129 + 8 - 8),
143 /* This struct is used to read all additional RX frame info at one push */
158 struct dwt_context *ctx = dev->data; in dwt_spi_read()
159 const struct dwt_hi_cfg *hi_cfg = dev->config; in dwt_spi_read()
178 const struct spi_buf_set rx = { in dwt_spi_read() local
187 if (spi_transceive(hi_cfg->bus.bus, ctx->spi_cfg, &tx, &rx)) { in dwt_spi_read()
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| D | ieee802154_kw41z.c | 1 /* ieee802154_kw41z.c - NXP KW41Z driver */
6 * SPDX-License-Identifier: Apache-2.0
35 * For non-invasive tracing of IRQ events. Sometimes the print logs
36 * will shift the timings around so this trace buffer can be used to
65 ZLL->EVENT_TMR >> ZLL_EVENT_TMR_EVENT_TMR_SHIFT; \
92 #define KW41Z_OUTPUT_POWER_MIN (-31)
127 1, /* -31.1 dBm: -31 */
128 2, 2, 2, 2, 2, 2, 2, /* -25.0 dBm: -30, -29, -28, -27, -26, -25 */
129 4, 4, 4, 4, 4, /* -19.0 dBm: -24, -23, -22, -21, -20, -19 */
130 6, 6, 6, /* -15.6 dBm: -18, -17, -16 */
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| /Zephyr-latest/drivers/dma/ |
| D | dma_iproc_pax_v2.c | 4 * SPDX-License-Identifier: Apache-2.0
36 return ring->pkt_id = 0x0; in reset_pkt_id()
41 ring->pkt_id = (ring->pkt_id + 1) % 32; in alloc_pkt_id()
42 return ring->pkt_id; in alloc_pkt_id()
47 return ring->pkt_id; in curr_pkt_id()
52 return ring->curr.toggle; in curr_toggle_val()
64 r->opq = opq; in rm_write_header_desc()
65 r->bdf = 0x0; in rm_write_header_desc()
66 r->res1 = 0x0; in rm_write_header_desc()
68 r->bdcount = bdcount; in rm_write_header_desc()
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| D | dma_iproc_pax_v1.c | 4 * SPDX-License-Identifier: Apache-2.0
33 return ring->pkt_id = 0x0; in reset_pkt_id()
41 ring->pkt_id = (ring->pkt_id + 1) % 32; in alloc_pkt_id()
42 return ring->pkt_id; in alloc_pkt_id()
47 return ring->pkt_id; in curr_pkt_id()
52 return ring->curr.toggle; in curr_toggle_val()
63 r->opq = opq; in rm_write_header_desc()
65 r->bdcount = bdcount; in rm_write_header_desc()
66 r->prot = 0x0; in rm_write_header_desc()
68 r->start = 1; in rm_write_header_desc()
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| /Zephyr-latest/include/zephyr/net/ |
| D | ieee802154_radio.h | 5 * SPDX-License-Identifier: Apache-2.0
12 * @note All references to the standard in this file cite IEEE 802.15.4-2020.
38 * @details This API provides a common representation of vendor-specific
44 * - a basic, mostly PHY-level driver API to be implemented by all drivers,
45 * - several optional MAC-level extension points to offload performance
51 * offloading to vendor-specific hardware or firmware features may be required
53 * subprotocols (e.g. fast enough ACK packages, precise timing of timed TX/RX in
56 * Whether or not MAC-level offloading extension points need to be implemented
60 * @note All section, table and figure references are to the IEEE 802.15.4-2020
67 * @name IEEE 802.15.4-2020, Section 6: MAC functional description
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| /Zephyr-latest/drivers/usb/device/ |
| D | usb_dc_rpi_pico.c | 4 * SPDX-License-Identifier: Apache-2.0
36 /* Needed for pico-sdk */
113 if (*ep_state->buf_ctl & USB_BUF_CTRL_AVAIL) { in udc_rpi_start_xfer()
119 return -ENOMEM; in udc_rpi_start_xfer()
124 memcpy(ep_state->buf, data, len); in udc_rpi_start_xfer()
127 ep_state->read_offset = 0; in udc_rpi_start_xfer()
130 LOG_DBG("xfer ep %d len %d pid: %d", ep, len, ep_state->next_pid); in udc_rpi_start_xfer()
131 val |= ep_state->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID; in udc_rpi_start_xfer()
133 ep_state->next_pid ^= 1u; in udc_rpi_start_xfer()
134 *ep_state->buf_ctl = val; in udc_rpi_start_xfer()
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| D | usb_dc_stm32.c | 3 * Copyright (c) 2017, I-SENSE group of ICCS
5 * SPDX-License-Identifier: Apache-2.0
41 * pin(s) in the device tree. E.g: pinctrl-0 = <&usb_otg_fs_vbus_pa9 ...>;
133 /* We need a minimum size for RX FIFO - exact number seemingly determined through trial and error */
139 #define TX_FIFO_WORDS (USB_RAM_SIZE / 4 - RX_FIFO_EP_WORDS - TX_FIFO_EP_0_WORDS)
141 #define TX_FIFO_EP_WORDS (TX_FIFO_WORDS / (TX_FIFO_NUM - 1))
156 uint16_t ep_pma_buf_len; /** Previously allocated buffer size */
160 uint32_t read_count; /** Number of bytes in read buffer */
161 uint32_t read_offset; /** Current offset in read buffer */
234 return -EIO; in usb_dc_stm32u5_phy_clock_select()
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.3.rst | 18 with future support for features like 64-bit and absolute timeouts in mind
21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant
24 * The CMSIS-DSP library is now included and integrated
33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String
34 into a fixed-size array.
35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS
37 * CVE-2020-10061: Improper handling of the full-buffer case in the
39 * CVE-2020-10062: Packet length decoding error in MQTT
40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due
42 * CVE-2020-10068: In the Zephyr project Bluetooth subsystem, certain
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| D | release-notes-3.1.rst | 61 * Split CAN classic and CAN-FD APIs:
90 was moved from Kconfig to :ref:`devicetree <dt-guide>`.
91 See the :dtcompatible:`st,stm32f1-pinctrl` devicetree binding for more information.
182 * MIPI-DSI
184 * Added a :ref:`MIPI-DSI api <mipi_dsi_api>`. This is an experimental API,
196 * Added support for enabling/disabling CAN-FD mode at runtime using :c:macro:`CAN_MODE_FD`.
215 * Added sampling and switching offset configuration
220 * Added support for Provisioners over PB-GATT
231 * Implemented ISO-AL TX unframed fragmentation
232 * Added support for back-to-back receiving of PDUs on nRF5x platforms
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| D | release-notes-2.5.rst | 27 * CVE-2021-3323: Under embargo until 2021-04-14
28 * CVE-2021-3321: Under embargo until 2021-04-14
29 * CVE-2021-3320: Under embargo until 2021-04-14
39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'.
57 Changed the default to match the HW POR state for this property.
63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive
67 timeout usage must use the new-style k_timeout_t type and not the
78 constant buffer as the ``payload`` argument instead of a pointer to a writable
79 buffer.
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| D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and
157 :dtcompatible:`fixed-partitions`.
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| D | release-notes-3.6.rst | 12 * New :ref:`GNSS subsystem <gnss_api>` added, enabling geo-awareness in Zephyr applications.
13 * New API and drivers introduced for interfacing with :ref:`keyboard matrices <gpio-kbd>`.
16 * Integrated Trusted Firmware-M (TF-M) 2.0, including an update to Mbed TLS 3.5.2.
23 * Over 30 new supported boards, spanning all Zephyr-supported architectures.
37 * CVE-2023-5779 `Zephyr project bug tracker GHSA-7cmj-963q-jj47
38 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-7cmj-963q-jj47>`_
40 * CVE-2023-6249 `Zephyr project bug tracker GHSA-32f5-3p9h-2rqc
41 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-32f5-3p9h-2rqc>`_
43 * CVE-2023-6749 `Zephyr project bug tracker GHSA-757h-rw37-66hw
44 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-757h-rw37-66hw>`_
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| /Zephyr-latest/arch/x86/core/ |
| D | x86_mmu.c | 2 * Copyright (c) 2011-2014 Wind River Systems, Inc.
3 * Copyright (c) 2017-2020 Intel Corporation
5 * SPDX-License-Identifier: Apache-2.0
29 * when the mapping was made. This is used to un-apply memory domain memory
51 * - If the entire entry is zero, it's an un-mapped virtual page
52 * - If PTE_ZERO is set, we flipped this page due to KPTI
53 * - Otherwise, this was a page-out
87 /* How many bits to right-shift a virtual address to obtain the
116 * See Figures 4-4, 4-7, 4-11 in the Intel SDM, vol 3A
154 /* 32-bit */
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