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/Zephyr-Core-3.5.0/dts/bindings/lora/
Dst,stm32wl-subghz-radio.yaml32 however, for optimal performance, it is advisable to align the value with
48 however, for optimal performance, it is advisable to align the value with
/Zephyr-Core-3.5.0/arch/arm/core/cortex_m/
Dprep_c.c26 * GCC can detect if memcpy is passed a NULL argument, however one of
78 * 0x00000000. However, it might be left un-cleared by firmware running in z_arm_floating_point_init()
118 * exception entry, however, the required area in the stack frame will in z_arm_floating_point_init()
146 * The use of the FP register bank is enabled, however the FP context in z_arm_floating_point_init()
154 * Upon reset, the CONTROL.FPCA bit is, normally, cleared. However, in z_arm_floating_point_init()
/Zephyr-Core-3.5.0/boards/arm/stm32f7508_dk/support/
Dopenocd.cfg14 # Event reset-init already uses the maximum speed however adapter speed
/Zephyr-Core-3.5.0/tests/kernel/mem_protect/demand_paging/boards/
Dqemu_x86_tiny.conf5 # However, specifying how many pages used by
/Zephyr-Core-3.5.0/boards/arm/stm32f746g_disco/support/
Dopenocd.cfg18 # Event reset-init already uses the maximum speed however adapter speed
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/usb/
Dusb.h10 * however, we dont have a good way to know how to name such an enum from
/Zephyr-Core-3.5.0/tests/kernel/device/
DCMakeLists.txt11 # However, enabling coverage forces -O0 to disable any compiler
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt5xx/
DKconfig.defconfig.mimxrt595_cm3332 # enable the Flash subsystem, however we would like to
/Zephyr-Core-3.5.0/lib/libc/arcmwdt/include/
Dfcntl.h17 * MWDT fcntl.h doesn't provide O_NONBLOCK, however it provides other file IO
/Zephyr-Core-3.5.0/include/zephyr/arch/arc/
Darc_addr_types.h15 * This causes extra warnings. However we can safely define
/Zephyr-Core-3.5.0/soc/riscv/openisa_rv32m1/
DKconfig11 # However, due to constraints imposed by Zephyr's file hierarchy
/Zephyr-Core-3.5.0/boards/arm/mps2_an521/
DCMakeLists.txt13 # However, if building with OPENAMP, there is no need to build
/Zephyr-Core-3.5.0/drivers/ethernet/
DKconfig.cyclonev20 However there must be enough descriptors to hold all fragments
/Zephyr-Core-3.5.0/boards/shields/npm1300_ek/doc/
Dindex.rst16 However, the Zephyr shield is designed expecting it to be connected to the
/Zephyr-Core-3.5.0/arch/arm64/core/
Dirq_init.c22 * When a custom interrupt controller is used, however, the SoC layer function
/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/api/mesh/
Dhealth_cli.rst16 However, if a Health Client model is instantiated on an element other than the
/Zephyr-Core-3.5.0/dts/bindings/gpio/
Dnuvoton,nct38xx-gpio-port.yaml27 NCT38XX series port 0 has Pin Multiplexing functionality. However, not
/Zephyr-Core-3.5.0/cmake/toolchain/xcc/
Dgeneric.cmake15 # However, CMake doesn't recognize it when invoking through xt-xcc.
/Zephyr-Core-3.5.0/doc/kernel/data_structures/
Drbtree.rst52 implementation, however, and is thus not always available in
60 default (however, this can be configured to use a fixed/maximally size
105 modification, however, routinely requires the ability to iterate
/Zephyr-Core-3.5.0/tests/boards/mec15xxevb_assy6853/i2c_api/
DREADME.txt12 to I2C00 port, however, I2C00 port is shared with UART2 RS232 to TTL
/Zephyr-Core-3.5.0/arch/posix/core/offsets/
Doffsets.c22 * are defined; however, it doesn't hurt to define all fields for the sake of
/Zephyr-Core-3.5.0/boards/shields/npm6001_ek/doc/
Dindex.rst22 However, the Zephyr shield is designed expecting it to be connected to the
/Zephyr-Core-3.5.0/subsys/demand_paging/backing_store/
Dram.c28 * This backing store is an example of the latter case. However, locations
43 * This will, however, require the implementation of a clean page
/Zephyr-Core-3.5.0/tests/crypto/tinycrypt/src/
Dtest_ecc_utils.h21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
/Zephyr-Core-3.5.0/tests/boards/mec172xevb_assy6906/i2c_api/
DREADME.txt12 to I2C00 port, however, I2C00 port is shared with UART2 RS232 to TTL

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