| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | zephyr,gpio-emul.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,gpio-emul"
8 include: [gpio-controller.yaml, base.yaml]
14 rising-edge:
18 falling-edge:
22 high-level:
23 description: Enables support for high level interrupt detection
26 low-level:
27 description: Enables support for low level interrupt detection
30 "#gpio-cells":
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| /Zephyr-Core-3.5.0/dts/bindings/i2c/ |
| D | atmel,sam-i2c-twim.yaml | 1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
2 # SPDX-License-Identifier: Apache-2.0
7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a
8 unique two-wire bus, made up of one clock line and one data line with speeds
9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
20 std-clk-slew-lim = <0>;
21 std-clk-strength-low = "0.5";
22 std-data-slew-lim = <0>;
23 std-data-strength-low = "0.5";
25 hs-clk-slew-lim = <0>;
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| /Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
| D | nuvoton,npcx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
20 An example for NPCX7 family, include the chip level pinctrl DTSI file in the
21 board level DTS:
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| D | nxp,mcux-rt11xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "high";
16 slew-rate = "slow";
20 Both pins will be configured with a weak latch, high drive strength,
22 Note that the soc level iomuxc dts file can be examined to find the possible
25 drive-open-drain: ODE/ODE_LPSR=1
26 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
27 bias-pull-down: PUE=1, PUS=0
28 bias-pull-up: PUE=1, PUS=1
29 bias-disable: PULL=11 (in supported registers)
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| D | pincfg-node.yaml | 2 # SPDX-License-Identifier: Apache-2.0
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
31 bias-pull-up:
33 description: enable pull-up resistor
35 bias-pull-down:
37 description: enable pull-down resistor
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| D | microchip,xec-pinctrl.yaml | 3 # SPDX-License-Identifier: Apache-2.0
7 Based on pincfg-node.yaml binding.
23 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
26 - bias-disable: Disable pull-up/down (default behavior, not required).
27 - bias-pull-down: Enable pull-down resistor.
28 - bias-pull-up: Enable pull-up resistor.
29 - drive-push-pull: Output driver is push-pull (default, not required).
30 - drive-open-drain: Output driver is open-drain.
31 - output-high: Set output state high when pin configured.
32 - output-low: Set output state low when pin configured.
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| /Zephyr-Core-3.5.0/include/zephyr/dt-bindings/gpio/ |
| D | nordic-nrf-gpio.h | 4 * SPDX-License-Identifier: Apache-2.0
10 * @brief nRF-specific GPIO Flags
11 * @defgroup gpio_interface_nrf nRF-specific GPIO Flags
20 * Standard (S) or High (H) drive modes can be applied to both pin levels, 0 or
21 * 1. High drive mode will increase current capabilities of the pin (refer to
24 * When the pin is configured to operate in open-drain mode (wired-and), the
25 * drive mode can only be selected for the 0 level (1 is disconnected).
26 * Similarly, when the pin is configured to operate in open-source mode
27 * (wired-or), the drive mode can only be set for the 1 level
33 * - Bit 8: Drive mode for '0' (0=Standard, 1=High)
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| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | nordic,nrf-spi-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 include: [spi-controller.yaml, pinctrl-device.yaml]
15 pinctrl-0:
18 max-frequency:
23 property must be set at SoC level DTS files.
25 overrun-character:
31 (line high), the most common value used in SPI transfers.
33 easydma-maxcnt-bits:
38 property must be set at SoC level DTS files.
40 wake-gpios:
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_basic_api/src/ |
| D | test_gpio_port.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #define ALL_BITS ((gpio_port_value_t)-1)
14 /* Short-hand for a checked read of PIN_IN raw state */
25 /* Short-hand for a checked read of PIN_IN logical state */
36 /* Short-hand for a checked write of PIN_OUT raw state */
50 /* Short-hand for a checked write of PIN_OUT logic state */
72 TC_PRINT("Validate device %s\n", dev->name); in setup()
75 TC_PRINT("Check %s output %d connected to input %d\n", dev->name, in setup()
91 TC_PRINT("FATAL output pin not wired to input pin? (out low => in high)\n"); in setup()
102 if (rc == -ENOTSUP) { in setup()
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| /Zephyr-Core-3.5.0/doc/build/dts/ |
| D | index.rst | 9 - to describe hardware to the :ref:`device_model_api`
10 - to provide that hardware's initial configuration
12 This page links to a high level guide on devicetree as well as reference
15 .. _dt-guide:
20 The pages in this section are a high-level guide to using devicetree for Zephyr
29 api-usage.rst
31 zephyr-user-node.rst
34 dt-vs-kconfig.rst
36 .. _dt-reference:
42 built-in bindings.
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| /Zephyr-Core-3.5.0/doc/project/ |
| D | proposals.rst | 1 .. _feature-tracking:
44 - Label new features requests as ``feature-request``
45 - The TSC discusses new ``feature-request`` items regularly and triages them.
50 - High = Next milestone
51 - Medium = As soon as possible
52 - Low = Best effort
54 - After the initial discussion and triaging, the label is moved from
55 ``feature-request`` to ``feature`` with the target milestone and an assignee.
57 All items marked as ``feature-request`` are non-binding and those without an
68 communicates the high-level overview of a project's strategy, while a release
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| /Zephyr-Core-3.5.0/dts/bindings/sdhc/ |
| D | nxp,imx-usdhc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx-usdhc"
8 include: [sdhc.yaml, pinctrl-device.yaml]
14 data-timeout:
20 read-watermark:
24 Number of words used as read watermark level in FIFO queue for USDHC
26 write-watermark:
30 Number of words used as write watermark level in FIFO queue for USDHC
41 pwr-gpios:
42 type: phandle-array
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | gpio.h | 2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
5 * Copyright (c) 2015-2016 Intel Corporation.
7 * SPDX-License-Identifier: Apache-2.0
26 #include <zephyr/dt-bindings/gpio/gpio.h>
58 /* Initializes output to a high state. */
61 /* Initializes output based on logic level */
68 /** Configures GPIO pin as output and initializes it to a high state. */
84 * interrupts. The interrupts can be sensitive to pin physical or logical level.
85 * Interrupts sensitive to pin logical level take into account GPIO_ACTIVE_LOW
86 * flag. If a pin was configured as Active Low, physical level low will be
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| /Zephyr-Core-3.5.0/subsys/emul/ |
| D | Kconfig | 4 # SPDX-License-Identifier: Apache-2.0
20 too high, or may return invalid measurements if calibration has not
21 yet been completed. This allows for testing that high-level code can
34 module-str = emul
|
| /Zephyr-Core-3.5.0/doc/hardware/emulator/ |
| D | index.rst | 19 high, or may return invalid measurements if calibration has not yet
20 been completed. This allows for testing that high-level code can
27 The diagram below shows application code / high-level tests at the top.
49 Controller) on native_posix using emulators for all non-chip drivers:
55 The 'real' code is shown in green. The Zephyr emulation-framework code is shown
71 native_posix. We can develop on a host, use source-level debugging, etc.
87 .. code-block:: C
97 #. ``bus_api`` - This points to the API for the upstream bus that the emulator
100 #. ``_backend_api`` - This points to the device-class specific backend API for
105 device-class.
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| /Zephyr-Core-3.5.0/subsys/logging/ |
| D | Kconfig.mode | 2 # SPDX-License-Identifier: Apache-2.0
23 performed in the context of the log entry (e.g. high priority
29 bool "Minimal-footprint"
47 level. To redirect logs at the macro level, see LOG_CUSTOM_HEADER.
61 extension of the LOG_* APIs at the macro level. Please use cautiously!
68 bool "Multi-domain logger"
|
| /Zephyr-Core-3.5.0/drivers/gpio/ |
| D | gpio_kscan_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
42 const struct gpio_kscan_cfg *const config = dev->config; in gpio_kscan_it8xxx2_configure()
43 volatile uint8_t *reg_ksi_kso_gctrl = config->reg_ksi_kso_gctrl; in gpio_kscan_it8xxx2_configure()
44 volatile uint8_t *reg_ksi_kso_goen = config->reg_ksi_kso_goen; in gpio_kscan_it8xxx2_configure()
45 volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; in gpio_kscan_it8xxx2_configure()
46 volatile uint8_t *reg_ksi_kso_gpod = config->reg_ksi_kso_gpod; in gpio_kscan_it8xxx2_configure()
53 return -ENOTSUP; in gpio_kscan_it8xxx2_configure()
65 /* Set open-drain and enable internal pullup */ in gpio_kscan_it8xxx2_configure()
68 /* Set push-pull and disable internal pullup */ in gpio_kscan_it8xxx2_configure()
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| /Zephyr-Core-3.5.0/samples/basic/custom_dts_binding/ |
| D | README.rst | 1 .. zephyr:code-sample:: gpio-custom-dts-binding
3 :relevant-api: gpio_interface devicetree-generic-id devicetree-generic-exist
10 In Zephyr, all hardware-specific configuration is described in the devicetree.
18 For typical use cases like LEDs or buttons, the existing :dtcompatible:`gpio-leds` or
19 :dtcompatible:`gpio-keys` compatibles can be used.
23 We assume that a load with high current demands should be switched on or off via a MOSFET. The
25 :zephyr_file:`samples/basic/custom_dts_binding/dts/bindings/power-switch.yaml`. The gate driver for
37 .. zephyr-app-commands::
38 :zephyr-app: samples/basic/custom_dts_binding
43 For demonstration purposes, some boards use the GPIO pin of the built-in LED.
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| /Zephyr-Core-3.5.0/samples/boards/esp32/deep_sleep/ |
| D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0
13 HIGH. Note that floating pins may trigger a wake up.
20 to wake up. Be aware that when low level is used to trigger wakeup,
21 an external pull-up resistance must be used.
|
| /Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/ |
| D | intc_esp32c3.h | 4 * SPDX-License-Identifier: Apache-2.0
14 * Interrupt allocation flags - These flags can be used to specify
18 /* Keep the LEVELx values as they are here; they match up with (1<<level) */
19 #define ESP_INTR_FLAG_LEVEL1 (1<<1) /* Accept a Level 1 int vector, lowest priority */
20 #define ESP_INTR_FLAG_LEVEL2 (1<<2) /* Accept a Level 2 int vector */
21 #define ESP_INTR_FLAG_LEVEL3 (1<<3) /* Accept a Level 3 int vector */
22 #define ESP_INTR_FLAG_LEVEL4 (1<<4) /* Accept a Level 4 int vector */
23 #define ESP_INTR_FLAG_LEVEL5 (1<<5) /* Accept a Level 5 int vector */
24 #define ESP_INTR_FLAG_LEVEL6 (1<<6) /* Accept a Level 6 int vector */
25 #define ESP_INTR_FLAG_NMI (1<<7) /* Accept a Level 7 int vector, highest priority */
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_pin_interrupt.c | 4 * SPDX-License-Identifier: Apache-2.0
61 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in test_gpio_pin_interrupt_edge()
64 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_edge()
87 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_edge()
135 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in test_gpio_pin_interrupt_level()
138 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_level()
167 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_level()
175 "Pin interrupt triggered on level %d", pin_out_val); in test_gpio_pin_interrupt_level()
183 "number of times on level %d", i, pin_out_val); in test_gpio_pin_interrupt_level()
189 "number of times on level %d", i, pin_out_val); in test_gpio_pin_interrupt_level()
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| D | test_config.c | 4 * SPDX-License-Identifier: Apache-2.0
39 * - Configure pin in in/out mode, verify that gpio_pin_set_raw /
41 * - Verify that GPIO_OUTPUT_HIGH flag is initializing the pin to high.
42 * - Verify that GPIO_OUTPUT_LOW flag is initializing the pin to low.
43 * - Verify that configuring the pin as an output without initializing it
44 * to high or low does not change pin state.
45 * - Verify that it is not possible to change value of a pin via
56 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in ZTEST()
68 if (ret == -ENOTSUP) { in ZTEST()
84 /* Verify that GPIO_OUTPUT_HIGH flag is initializing the pin to high. */ in ZTEST()
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|
| /Zephyr-Core-3.5.0/doc/hardware/cache/ |
| D | index.rst | 1 .. _cache-guide:
6 This is a high-level guide to cache interface and Kconfig options related to
14 selected at SoC / platform level when the CPU actually supports a data or
32 some platform-specific code to enable and manage the d-cache.
44 whether the cache operations are implemented at arch level or using an
|
| /Zephyr-Core-3.5.0/drivers/dai/intel/ssp/ |
| D | dai-params-intel-ipc4.h | 4 * SPDX-License-Identifier: Apache-2.0
16 /**< HD/A host output (-> DSP). */
18 /**< HD/A host input (<- DSP). */
23 /**< HD/A link output (DSP ->). */
25 /**< HD/A link input (DSP <-). */
30 /**< DMIC link input (DSP <-). */
33 /**< I2S link output (DSP ->). */
35 /**< I2S link input (DSP <-). */
38 /**< ALH link output, legacy for SNDW (DSP ->). */
40 /**< ALH link input, legacy for SNDW (DSP <-). */
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| /Zephyr-Core-3.5.0/samples/subsys/sensing/simple/ |
| D | README.rst | 1 .. zephyr:code-sample:: sensing
3 :relevant-api: sensing_api
5 Get high-level sensor data in defined intervals.
31 .. zephyr-app-commands::
32 :zephyr-app: samples/subsys/sensing/simple
33 :host-os: unix
|
