/Zephyr-latest/dts/bindings/fpga/ |
D | lattice,ice40-fpga-bitbang.yaml | 3 # SPDX-License-Identifier: Apache-2.0 7 compatible: "lattice,ice40-fpga-bitbang" 9 include: lattice,ice40-fpga-base.yaml 12 clk-gpios: 13 type: phandle-array 18 clk-gpios = <&gpio0 5 GPIO_PUSH_PULL>; 19 pico-gpios: 20 type: phandle-array 23 Peripheral-In Controller-Out GPIO input on iCE40. 25 pico-gpios = <&gpio0 7 GPIO_PUSH_PULL>; [all …]
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/Zephyr-latest/tests/drivers/build_all/fpga/ |
D | spi.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 11 compatible = "lattice,ice40-fpga-bitbang"; 13 reg = <0>; 14 spi-max-frequency = <1000000>; 16 cdone-gpios = <&test_gpio 0 0>; 17 creset-gpios = <&test_gpio 0 0>; 18 clk-gpios = <&test_gpio 0 0>; 19 pico-gpios = <&test_gpio 0 0>; 20 gpios-set-reg = <0>; 21 gpios-clear-reg = <0>; [all …]
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/Zephyr-latest/dts/bindings/input/ |
D | ite,it8xxx2-kbd.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 compatible: "ite,it8xxx2-kbd" 8 include: [kbd-matrix-common.yaml, pinctrl-device.yaml] 11 reg: 23 enable, disable, and clear wakeup status for the specific pin which 26 kso16-gpios: 27 type: phandle-array 32 kso17-gpios: 33 type: phandle-array 38 kso-ignore-mask: [all …]
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/Zephyr-latest/drivers/gpio/ |
D | gpio_rt1718s_port.c | 4 * SPDX-License-Identifier: Apache-2.0 10 * @file Driver for RS1718S TCPC chip GPIOs. 41 const struct gpio_rt1718s_port_config *const config = dev->config; in gpio_rt1718s_pin_config() 42 struct gpio_rt1718s_port_data *const data = dev->data; in gpio_rt1718s_pin_config() 48 return -ENOTSUP; in gpio_rt1718s_pin_config() 53 return -ENOTSUP; in gpio_rt1718s_pin_config() 56 /* RT1718S has 3 GPIOs so check range */ in gpio_rt1718s_pin_config() 58 return -EINVAL; in gpio_rt1718s_pin_config() 64 /* Set pull-high/low input */ in gpio_rt1718s_pin_config() 75 /* Set push-pull or open-drain */ in gpio_rt1718s_pin_config() [all …]
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D | gpio_intel.c | 2 * Copyright (c) 2018-2019 Intel Corporation 4 * SPDX-License-Identifier: Apache-2.0 14 * both GPIOs and Pinmuxing function. This driver provides 17 * Due to GPIO callback only allowing 32 pins (as a 32-bit mask) at once, 18 * each set is further sub-divided into multiple devices, so 30 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h> 92 ((const struct gpio_intel_config *)(_dev)->config) 93 #define DEV_DATA(_dev) ((struct gpio_intel_data *)(_dev)->data) 130 #define REG_GPI_INT_STS_BASE_GET(data) (data)->intr_stat_reg 132 #define REG_GPI_INT_EN_BASE_GET(data) (data)->intr_stat_reg + 0x20 [all …]
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D | gpio_nct38xx_port.c | 4 * SPDX-License-Identifier: Apache-2.0 43 const struct gpio_nct38xx_port_config *const config = dev->config; in gpio_nct38xx_pin_config() 44 struct gpio_nct38xx_port_data *const data = dev->data; in gpio_nct38xx_pin_config() 51 return -ENOTSUP; in gpio_nct38xx_pin_config() 56 return -ENOTSUP; in gpio_nct38xx_pin_config() 59 /* Don't support pull-up/pull-down */ in gpio_nct38xx_pin_config() 61 return -ENOTSUP; in gpio_nct38xx_pin_config() 64 k_sem_take(data->lock, K_FOREVER); in gpio_nct38xx_pin_config() 67 if (config->gpio_port == 0) { in gpio_nct38xx_pin_config() 70 * of non-reserved bits. in gpio_nct38xx_pin_config() [all …]
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D | gpio_pca_series.c | 4 * SPDX-License-Identifier: Apache-2.0 8 * @file Driver for PCA(L)xxxx SERIES I2C-based GPIO expander. 69 * Device reg layout types: 70 * - Type 0: PCA953X, PCA955X 71 * - Type 1: PCAL953X, PCAL955X, PCAL64XXA 72 * - Type 2: PCA957X 73 * - Type 3: PCAL65XX 103 * port-level "pin output configuration" register. 144 uint8_t port_no; /* number of 8-pin ports on device */ 170 void *cache; /** device spicific reg cache [all …]
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/Zephyr-latest/drivers/rtc/ |
D | rtc_am1805.c | 2 * SPDX-License-Identifier: Apache-2.0 88 /* am1805-gpios property must be in the devicetree inorder to use the RTC_ALARM */ 90 #error "am1805-gpios" - property not available in devicetree. 106 /* For gpio-interrupt */ 121 struct am1805_data *data = dev->data; in am1805_set_time() 122 const struct am1805_config *config = dev->config; in am1805_set_time() 124 k_mutex_lock(&data->lock, K_FOREVER); in am1805_set_time() 126 /* To unlock Stop-bit */ in am1805_set_time() 127 err = i2c_reg_update_byte_dt(&config->int_i2c, REG_CONTROL1_ADDR, in am1805_set_time() 135 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, tm->tm_min, in am1805_set_time() [all …]
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D | rtc_pcf8523.c | 2 * Copyright (c) 2019-2023 Henrik Brix Andersen <henrik@brixandersen.dk> 4 * SPDX-License-Identifier: Apache-2.0 108 /* The PCF8523 only supports two-digit years, calculate offset to use */ 109 #define PCF8523_YEARS_OFFSET (2000 - 1900) 114 /* Helper macro to guard int1-gpios related code */ 152 const struct pcf8523_config *config = dev->config; in pcf8523_read_regs() 155 err = i2c_write_read_dt(&config->i2c, &addr, sizeof(addr), buf, len); in pcf8523_read_regs() 157 LOG_ERR("failed to read reg addr 0x%02x, len %d (err %d)", addr, len, err); in pcf8523_read_regs() 171 const struct pcf8523_config *config = dev->config; in pcf8523_write_regs() 178 err = i2c_write_dt(&config->i2c, block, sizeof(block)); in pcf8523_write_regs() [all …]
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D | rtc_rv3028.c | 4 * SPDX-License-Identifier: Apache-2.0 120 /* The RV3028 only supports two-digit years. Leap years are correctly handled from 2000 to 2099 */ 121 #define RV3028_YEAR_OFFSET (2000 - 1900) 140 /* Helper macro to guard int-gpios related code */ 175 struct rv3028_data *data = dev->data; in rv3028_lock_sem() 177 (void)k_sem_take(&data->lock, K_FOREVER); in rv3028_lock_sem() 182 struct rv3028_data *data = dev->data; in rv3028_unlock_sem() 184 k_sem_give(&data->lock); in rv3028_unlock_sem() 189 const struct rv3028_config *config = dev->config; in rv3028_read_regs() 192 err = i2c_write_read_dt(&config->i2c, &addr, sizeof(addr), buf, len); in rv3028_read_regs() [all …]
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/Zephyr-latest/drivers/serial/ |
D | uart_mchp_xec.c | 2 * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc. 6 * SPDX-License-Identifier: Apache-2.0 52 #define REG_THR 0x00 /* Transmitter holding reg. */ 53 #define REG_RDR 0x00 /* Receiver data reg. */ 56 #define REG_IER 0x01 /* Interrupt enable reg. */ 57 #define REG_IIR 0x02 /* Interrupt ID reg. */ 58 #define REG_FCR 0x02 /* FIFO control reg. */ 59 #define REG_LCR 0x03 /* Line control reg. */ 60 #define REG_MDC 0x04 /* Modem control reg. */ 61 #define REG_LSR 0x05 /* Line status reg. */ [all …]
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/Zephyr-latest/drivers/ethernet/ |
D | eth_smsc911x.c | 2 * Copyright (c) 2017-2018 ARM Limited 5 * SPDX-License-Identifier: Apache-2.0 57 static int smsc_mac_regread(uint8_t reg, uint32_t *val) in smsc_mac_regread() argument 59 uint32_t cmd = MAC_CSR_CMD_BUSY | MAC_CSR_CMD_READ | reg; in smsc_mac_regread() 61 SMSC9220->MAC_CSR_CMD = cmd; in smsc_mac_regread() 63 while ((SMSC9220->MAC_CSR_CMD & MAC_CSR_CMD_BUSY) != 0) { in smsc_mac_regread() 66 *val = SMSC9220->MAC_CSR_DATA; in smsc_mac_regread() 71 static int smsc_mac_regwrite(uint8_t reg, uint32_t val) in smsc_mac_regwrite() argument 73 uint32_t cmd = MAC_CSR_CMD_BUSY | MAC_CSR_CMD_WRITE | reg; in smsc_mac_regwrite() 75 SMSC9220->MAC_CSR_DATA = val; in smsc_mac_regwrite() [all …]
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/Zephyr-latest/drivers/can/ |
D | can_tcan4x5x.c | 4 * SPDX-License-Identifier: Apache-2.0 21 * The register definitions correspond to those found in the TI TCAN4550-Q1 datasheet, revision D 209 * Only compile in support for the optional GPIOs if at least one enabled tcan4x5x device tree node 241 const struct can_mcan_config *mcan_config = dev->config; in tcan4x5x_read() 242 const struct tcan4x5x_config *tcan_config = mcan_config->custom; in tcan4x5x_read() 271 /* Maximum transfer size is 256 32-bit words */ in tcan4x5x_read() 275 err = spi_transceive_dt(&tcan_config->spi, &tx, &rx); in tcan4x5x_read() 292 const struct can_mcan_config *mcan_config = dev->config; in tcan4x5x_write() 293 const struct tcan4x5x_config *tcan_config = mcan_config->custom; in tcan4x5x_write() 321 /* Maximum transfer size is 256 32-bit words */ in tcan4x5x_write() [all …]
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/Zephyr-latest/drivers/ieee802154/ |
D | ieee802154_rf2xx.c | 1 /* ieee802154_rf2xx.c - ATMEL RF2XX IEEE 802.15.4 Driver */ 6 * Copyright (c) 2019-2020 Gerson Fernando Budke 8 * SPDX-License-Identifier: Apache-2.0 67 .rssi = -40, 84 k_sem_give(&ctx->trx_isr_lock); in trx_isr_handler() 111 * Datasheet: Figure 7-13. Timing Example of an RX_AACK Transaction in rf2xx_trx_set_tx_state() 141 struct rf2xx_context *ctx = dev->data; in rf2xx_set_rssi_base() 144 if (ctx->cc_page == IEEE802154_ATTR_PHY_CHANNEL_PAGE_ZERO_OQPSK_2450_BPSK_868_915) { in rf2xx_set_rssi_base() 148 } else if (ctx->cc_page == IEEE802154_ATTR_PHY_CHANNEL_PAGE_TWO_OQPSK_868_915) { in rf2xx_set_rssi_base() 156 ctx->trx_rssi_base = base; in rf2xx_set_rssi_base() [all …]
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/Zephyr-latest/drivers/pinctrl/ |
D | pinctrl_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0 53 * KSO push-pull/open-drain bit of KSO[15:0] control register 74 const struct pinctrl_it8xxx2_config *pinctrl_config = pins->pinctrls->config; in pinctrl_it8xxx2_set() 75 const struct pinctrl_it8xxx2_gpio *gpio = &(pinctrl_config->gpio); in pinctrl_it8xxx2_set() 76 uint32_t pincfg = pins->pincfg; in pinctrl_it8xxx2_set() 77 uint8_t pin = pins->pin; in pinctrl_it8xxx2_set() 78 volatile uint8_t *reg_gpcr = (uint8_t *)gpio->reg_gpcr + pin; in pinctrl_it8xxx2_set() 79 volatile uint8_t *reg_volt_sel = (uint8_t *)(gpio->volt_sel[pin]); in pinctrl_it8xxx2_set() 80 volatile uint8_t *reg_pdsc = (uint8_t *)gpio->reg_pdsc; in pinctrl_it8xxx2_set() 82 /* Setting pull-up or pull-down. */ in pinctrl_it8xxx2_set() [all …]
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/Zephyr-latest/scripts/dts/python-devicetree/src/devicetree/ |
D | edtlib.py | 3 # SPDX-License-Identifier: BSD-3-Clause 17 but a binding can also come from a 'child-binding:' key in the binding for the 23 The top-level entry points for the library are the EDT and Binding classes. 31 # -------------------- 47 # - Consider using @property for APIs that don't need parameters. It makes 51 # - Think about the data type of the thing you're exposing. Exposing something 55 # - Avoid get_*() prefixes on functions. Name them after the thing they return 60 # - Don't expose dtlib stuff directly. 62 # - Add documentation for any new APIs you add. 108 The free-form description of the binding, or None. [all …]
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/Zephyr-latest/drivers/flash/ |
D | spi_nor.c | 2 * Copyright (c) 2018 Savoir-Faire Linux. 8 * SPDX-License-Identifier: Apache-2.0 36 * * Some devices support a Deep Power-Down mode which reduces current 41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode; 63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config) 66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */ 72 /* Build-time data associated with the device. */ 92 /* Expected JEDEC ID, from jedec-id property */ 96 /* Optional support for entering 32-bit address mode. */ 101 /* Length of BFP structure, in 32-bit words. */ [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-3.3.rst | 14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery) 17 CMSIS-DSP as the default backend. 30 * CVE-2023-0359: Under embargo until 2023-04-20 32 * CVE-2023-0779: Under embargo until 2023-04-22 66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding. 71 * Starting from this release ``zephyr-`` prefixed tags won't be created 82 image states). Use of a truncated hash or non-sha256 hash will still work 88 registration function at boot-up. If applications register this then 93 application code, these will now automatically be registered at boot-up (this 129 This may cause out-of-tree scripts or commands to fail if they have relied [all …]
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D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`). 15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`. 31 * CVE-2022-2993: Under embargo until 2022-11-03 33 * CVE-2022-2741: Under embargo until 2022-10-14 56 This definition can be used by third-party code to compile code conditional 58 Therefore, any third-party code integrated using the Zephyr build system will 83 their context more clear: 91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates 129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig 156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and [all …]
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D | release-notes-2.0.rst | 12 * The kernel now supports both 32- and 64-bit architectures. 17 * We added support for :ref:`Point-to-Point Protocol (PPP) <ppp>`. PPP is a 20 * We added support for UpdateHub, an end-to-end solution for large scale 21 over-the-air device updates. 22 * We added support for ARM Cortex-R Architecture (Experimental). 32 * Fixes CVE-2019-9506: The Bluetooth BR/EDR specification up to and 35 negotiation. This allows practical brute-force attacks (aka "KNOB") 42 * New kernel API for per-thread disabling of Floating Point Services for 43 ARC, ARM Cortex-M, and x86 architectures. 45 * Additional support for compatibility with 64-bit architectures. [all …]
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D | release-notes-1.14.rst | 17 * CVE-2020-10066 18 * CVE-2020-10069 19 * CVE-2020-13601 20 * CVE-2020-13602 32 * :github:`issuenumber` - issue title 34 * :github:`18334` - DNS resolution is broken for some addresses in master/2.0-pre 35 * :github:`19917` - Bluetooth: Controller: Missing LL_ENC_RSP after HCI LTK Negative Reply 36 * :github:`21107` - LL_ASSERT and 'Imprecise data bus error' in LL Controller 37 * :github:`21257` - tests/net/net_pkt failed on mimxrt1050_evk board. 38 * :github:`21299` - bluetooth: Controller does not release buffer on central side after peripheral … [all …]
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D | release-notes-2.5.rst | 27 * CVE-2021-3323: Under embargo until 2021-04-14 28 * CVE-2021-3321: Under embargo until 2021-04-14 29 * CVE-2021-3320: Under embargo until 2021-04-14 39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_. 56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'. 63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive 67 timeout usage must use the new-style k_timeout_t type and not the 87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a 101 * ARM Musca-A board and SoC support deprecated and planned to be removed in 2.6.0. 146 sys_heap/k_heaps. Note that the new-style heap is a general [all …]
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