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/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Drenesas-rz-gpio.h3 * SPDX-License-Identifier: Apache-2.0
12 * @brief RZ G3S specific GPIO Flags
15 * - Bit 9..8: Pin driving ability value
16 * - Bit 11..10: Digital Noise Filter Clock Selection value
17 * - Bit 13..12: Digital Noise Filter Number value
18 * - Bit 14: Digital Noise Filter ON/OFF
20 * gpio-consumer {
21 * out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_FILTER_SET(1, 3, 3))>;
23 * gpio-consumer {
24 * out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_IOLH_SET(2))>;
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/Zephyr-latest/dts/bindings/gpio/
Drenesas,rz-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Reneses RZ GPIO controller node.
7 gpio-consumer{
8 out-gpio = <&gpio8 2 (GPIO_PULL_UP);
15 - Using interrupt TINT10
16 - Set Pullup
19 compatible: "renesas,rz-gpio"
22 - name: base.yaml
23 property-allowlist:
24 - status
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/Zephyr-latest/doc/services/input/
Dgpio-kbd.rst1 .. _gpio-kbd:
3 GPIO Keyboard Matrix
6 The :dtcompatible:`gpio-kbd-matrix` driver supports a large variety of keyboard
17 This is the common configuration found on consumer keyboards with membrane
21 .. figure:: no-diodes.svg
27 The system must support GPIO interrupts, and the interrupt can be enabled on all
30 .. code-block:: devicetree
32 kbd-matrix {
33 compatible = "gpio-kbd-matrix";
34 row-gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>,
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/Zephyr-latest/modules/hal_gigadevice/
DKconfig1 # Copyright (c) 2021 ATL-Electronics
2 # SPDX-License-Identifier: Apache-2.0
85 Enable GD32 Analog-to-Digital Converter (ADC) HAL module driver
100 Enable GD32 Consumer Electronics Control (CEC) HAL module driver
121 Enable GD32 Digital-to-Analog Converter (DAC) HAL module driver
167 Enable GD32 General-purpose and Alternate-Function I/Os
168 (GPIO and AFIO) HAL module driver
173 Enable GD32 Inter-Integrated Circuit Interface (I2C) HAL module driver
204 Enable GD32 Real-Time Clock (RTC) HAL module driver
225 Enable GD32 Super High-Resolution Timer (SHRTIMER) HAL module driver
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/Zephyr-latest/boards/nxp/mimxrt1180_evk/doc/
Dindex.rst6 The dual core i.MX RT1180 runs on the Cortex-M33 core at 240 MHz and on the
7 Cortex-M7 at 792 MHz. The i.MX RT1180 MCU offers support over a wide
8 temperature range and is qualified for consumer, industrial and automotive
14 - MIMXRT1189CVM8B MCU
16 - 240MHz Cortex-M33 & 792Mhz Cortex-M7
17 - 1.5MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
19 - Memory
21 - 512 Mbit SDRAM
22 - 128 Mbit QSPI Flash
23 - 512 Mbit HYPER RAM
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/Zephyr-latest/boards/96boards/avenger96/doc/
Dindex.rst10 multi-core processor, composed of a dual Cortex®-A7 and a single Cortex®-M4
11 core. Zephyr OS is ported to run on the Cortex®-M4 core.
13 - Board features:
15 - PMIC: STPMIC1A
16 - RAM: 1024 Mbyte @ 533MHz
17 - Storage:
19 - eMMC: v4.51: 8 Gbyte
20 - QSPI: 2Mbyte
21 - EEPROM: 128 byte
22 - microSD Socket: UHS-1 v3.01
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/Zephyr-latest/boards/nxp/mimxrt1160_evk/doc/
Dindex.rst6 The dual core i.MX RT1160 runs on the Cortex-M7 core at 600 MHz and on the
7 Cortex-M4 at 240 MHz. The i.MX RT1160 MCU offers support over a wide
8 temperature range and is qualified for consumer, industrial and automotive
14 - MIMXRT1166DVM6A MCU
16 - 600MHz Cortex-M7 & 240Mhz Cortex-M4
17 - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
19 - Memory
21 - 512 Mbit SDRAM
22 - 128 Mbit QSPI Flash
23 - 512 Mbit Octal Flash
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/Zephyr-latest/soc/ite/ec/common/
Dchip_chipregs.h3 * SPDX-License-Identifier: Apache-2.0
48 /* --- General Control (GCTRL) --- */
52 /* RISC-V JTAG Debug Interface Enable */
54 /* RISC-V JTAG Debug Interface Selection */
67 /* --- External GPIO Control (EGPIO) --- */
73 * 0x04: External GPIO Control
192 /* GPIO control register */
265 /* 0x049: PWM Output Open-Drain Enable */
280 /* --- Wake-Up Control (WUC) --- */
284 /* TODO: should a defined interface for configuring wake-up interrupts */
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/Zephyr-latest/doc/releases/
Drelease-notes-3.1.rst61 * Split CAN classic and CAN-FD APIs:
90 was moved from Kconfig to :ref:`devicetree <dt-guide>`.
91 See the :dtcompatible:`st,stm32f1-pinctrl` devicetree binding for more information.
121 * GPIO
131 :c:struct:`gpio_dt_spec` member named ``gpio``.
182 * MIPI-DSI
184 * Added a :ref:`MIPI-DSI api <mipi_dsi_api>`. This is an experimental API,
196 * Added support for enabling/disabling CAN-FD mode at runtime using :c:macro:`CAN_MODE_FD`.
220 * Added support for Provisioners over PB-GATT
231 * Implemented ISO-AL TX unframed fragmentation
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Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
68 * Regulator APIs previously located in ``<zephyr/drivers/regulator/consumer.h>``
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
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/Zephyr-latest/drivers/counter/
Dmaxim_ds3231.c2 * Copyright (c) 2019-2020 Peter Bigot Consulting, LLC
4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/drivers/gpio.h>
33 /* Return lower 32-bits of time as counter value */
107 * such an operation, or when doing a no-notify synchronize
148 struct ds3231_data *data = dev->data; in sc_ctrl()
149 const struct ds3231_config *cfg = dev->config; in sc_ctrl()
150 struct register_map *rp = &data->registers; in sc_ctrl()
151 uint8_t ctrl = (rp->ctrl & ~clear) | set; in sc_ctrl()
154 if (rp->ctrl != ctrl) { in sc_ctrl()
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/Zephyr-latest/boards/nxp/mimxrt1170_evk/doc/
Dindex.rst6 The dual core i.MX RT1170 runs on the Cortex-M7 core at 1 GHz and on the Cortex-M4
8 and is qualified for consumer, industrial and automotive markets. Zephyr
14 - MIMXRT1176DVMAA MCU
16 - 1GHz Cortex-M7 & 400Mhz Cortex-M4
17 - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
19 - Memory
21 - 512 Mbit SDRAM
22 - 128 Mbit QSPI Flash
23 - 512 Mbit Octal Flash
24 - 2 Gbit raw NAND flash
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/Zephyr-latest/boards/nxp/vmu_rt1170/doc/
Dindex.rst7 Cortex-M7 core at 1 GHz and a Cortex-M4 at 400 MHz.
9 and is qualified for consumer, industrial and automotive markets.
16 - MIMXRT1176DVMAA MCU
18 - 1GHz Cortex-M7 & 400Mhz Cortex-M4
19 - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
21 - Memory
23 - 512 Mbit Octal Flash
24 - TF socket for SD card
26 - Ethernet
28 - 2 wire 100BASE-T1
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