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/Zephyr-latest/tests/kernel/pending/
DREADME.txt6 kernel objects: FIFOs, LIFOs, semaphores and timers.
36 Testing preemptible threads block on fifos ...
37 Testing fifos time-out in correct order ...
38 Testing fifos delivered data correctly ...
/Zephyr-latest/samples/philosophers/
Dsample.yaml30 sample.kernel.philosopher.fifos:
31 extra_args: FORKS=FIFOS
/Zephyr-latest/dts/bindings/spi/
Dst,stm32-spi-fifo.yaml4 description: STM32 SPI controller with embedded Rx and Tx FIFOs
Dintel,penwell-spi.yaml40 description: SPI controller with embedded Tx and Rx FIFOs.
/Zephyr-latest/tests/kernel/fifo/fifo_api/src/
Dmain.c17 * @defgroup kernel_fifo_tests FIFOs
/Zephyr-latest/kernel/
DKconfig.obj_core30 bool "Integrate FIFOs into object core framework"
33 When enabled, this option integrates FIFOs into the object core
/Zephyr-latest/samples/philosophers/src/
Dphil_obj_abstract.h35 #if (FORKS == FIFOS) || (FORKS == LIFOS)
94 #elif FORKS == FIFOS
115 #define fork_type_str "fifos"
Dmain.c13 * synchronization: SEMAPHORES, MUTEXES, STACKS, FIFOS and LIFOS. To configure
51 #define FIFOS 4 macro
74 #define FORKS FIFOS
/Zephyr-latest/tests/bsim/bluetooth/ll/edtt/common/
Dedtt_driver_bsim.c198 bs_trace_error_line("Couldn't create FIFOs for EDTT IF\n"); in edptd_create_fifo_if()
204 bs_trace_error_line("Couldn't create FIFOs for EDTT IF\n"); in edptd_create_fifo_if()
214 bs_trace_error_line("Couldn't create FIFOs for EDTT IF\n"); in edptd_create_fifo_if()
257 "the FIFOs and move on\n"); in fifo_low_level_read()
/Zephyr-latest/dts/bindings/serial/
Dinfineon,xmc4xxx-uart.yaml38 where the tx and rx fifos will start. When sharing the fifo, the user must properly
40 capacity of 64 entries. The tx/rx fifos are created on fifo-xx-size aligned
/Zephyr-latest/drivers/serial/
Duart_cc32xx.c51 * Keeping with this assumption, this driver leaves the FIFOs disabled,
70 /* This also calls MAP_UARTEnable() to enable the FIFOs: */ in uart_cc32xx_init()
77 /* Re-disable the FIFOs: */ in uart_cc32xx_init()
200 /* FIFOs are left disabled from reset, so UART_INT_RT flag not used. */ in uart_cc32xx_irq_rx_enable()
Duart_opentitan.c50 /* Clear FIFOs. */ in uart_opentitan_init()
Duart_pl011_registers.h79 #define PL011_LCRH_FEN BIT(4) /* enable FIFOs */
/Zephyr-latest/drivers/i2c/
DKconfig.it8xxx223 The I2C controller supports two 32-bytes FIFOs,
Di2c_bcm_iproc.c239 /* flush target TX/RX FIFOs */ in iproc_i2c_target_init()
441 /* flush TX FIFOs */ in iproc_i2c_target_isr()
513 /* flush TX/RX FIFOs and set RX FIFO threshold to zero */ in iproc_i2c_common_init()
579 /* flush both Master TX/RX FIFOs */ in iproc_i2c_check_status()
755 /* flush both Master TX/RX FIFOs */ in iproc_i2c_transfer_one()
/Zephyr-latest/lib/utils/
DKconfig15 Enable usage of ring buffers. This is similar to kernel FIFOs but ring
/Zephyr-latest/drivers/dai/intel/dmic/
DKconfig.dmic63 int "Number of stream FIFOs in DMIC controller"
/Zephyr-latest/doc/kernel/services/data_passing/
Dfifos.rst3 FIFOs chapter
17 Any number of FIFOs can be defined (limited only by available RAM). Each FIFO is
/Zephyr-latest/tests/kernel/fifo/fifo_timeout/src/
Dmain.c25 * multiple fifos.
137 /* Spins several threads that pend and timeout on fifos */
453 * @brief Test multiple fifos with different timeouts
454 * @details test multiple threads pending on different fifos
464 * fifos with different timeouts in ZTEST()
/Zephyr-latest/tests/kernel/pending/src/
Dmain.c316 TC_PRINT("Testing preemptible threads block on fifos ...\n"); in ZTEST()
330 TC_PRINT("Testing fifos time-out in correct order ...\n"); in ZTEST()
349 TC_PRINT("Testing fifos delivered data correctly ...\n"); in ZTEST()
/Zephyr-latest/doc/hardware/peripherals/sensor/
Dread_and_decode.rst56 * Sensor FIFOs supported by wiring up FIFO triggers to read data into
/Zephyr-latest/drivers/entropy/
Dentropy_smartbond.c90 * Sleep is not allowed as long as the ISR and thread SW FIFOs in trng_enable()
379 * No need to turn on TRNG. It should be done when we the space in the FIFOs in entropy_smartbond_pm_action()
/Zephyr-latest/doc/kernel/services/
Dindex.rst88 data_passing/fifos.rst
/Zephyr-latest/tests/benchmarks/sys_kernel/src/
Dmwfifo.c20 * @brief Initialize FIFOs for the test
/Zephyr-latest/drivers/peci/
Dpeci_mchp_xec.c233 /* Only reset internal FIFOs */ in peci_xec_bus_recovery()
364 * before resetting the internal FIFOs in peci_xec_read()

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