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/cmsis-dsp-latest/dsppp/RTE/Device/SSE_300_MPS3/
Dregions_V2M_MPS3_SSE_300_FVP.h19 // <i> Default: 0x10000000
23 // <i> Default: 0x00200000
25 // <q>Default region
36 // <i> Default: 0x00000000
40 // <i> Default: 0x00200000
42 // <q>Default region
53 // <i> Default: 0x30000000
57 // <i> Default: 0x00020000
59 // <q>Default region
70 // <i> Default: 0x20000000
[all …]
/cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_300_MPS3/
Dregions_SSE_300_MPS3.h19 // <i> Default: 0x00000000
23 // <i> Default: 0x00080000
25 // <q>Default region
36 // <i> Default: 0x01000000
40 // <i> Default: 0x00100000
42 // <q>Default region
53 // <i> Default: 0x20000000
57 // <i> Default: 0x00020000
59 // <q>Default region
70 // <i> Default: 0x20020000
[all …]
/cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_310_MPS3/
Dregions_SSE_310_MPS3.h19 // <i> Default: 0x00000000
23 // <i> Default: 0x00008000
25 // <q>Default region
36 // <i> Default: 0x01000000
40 // <i> Default: 0x00200000
42 // <q>Default region
53 // <i> Default: 0x20000000
57 // <i> Default: 0x00002000
59 // <q>Default region
70 // <i> Default: 0x20002000
[all …]
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dregions_SSE-310-MPS3.h19 // <i> Default: 0x00000000
23 // <i> Default: 0x00008000
25 // <q>Default region
36 // <i> Default: 0x01000000
40 // <i> Default: 0x00200000
42 // <q>Default region
53 // <i> Default: 0x20000000
57 // <i> Default: 0x00002000
59 // <q>Default region
70 // <i> Default: 0x20002000
[all …]
/cmsis-dsp-latest/Testing/cmsis_build/configs/
DARM_VHT_MPS2_M33_DSP_FP_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : En…
5 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
6 cpu0.DSP=1 # (bool , init-time) default = '1' : Se…
7 cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : T3…
9 cpu0.semihosting-cmd_line="" # (string, init-time) default = '' : Co…
10 cpu0.semihosting-heap_base=0x0 # (int , init-time) default = '0x0' : Vi…
11 cpu0.semihosting-heap_limit=0x0 # (int , init-time) default = '0x10700000' …
12 cpu0.semihosting-stack_base=0x0 # (int , init-time) default = '0x10700000' …
[all …]
DARM_VHT_MPS2_M35P_DSP_FP_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : En…
5 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
6 cpu0.DSP=1 # (bool , init-time) default = '1' : Se…
7 cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : T3…
9 cpu0.semihosting-cmd_line="" # (string, init-time) default = '' : Co…
10 cpu0.semihosting-heap_base=0x0 # (int , init-time) default = '0x0' : Vi…
11 cpu0.semihosting-heap_limit=0x0 # (int , init-time) default = '0x10700000' …
12 cpu0.semihosting-stack_base=0x0 # (int , init-time) default = '0x10700000' …
[all …]
DARM_VHT_MPS2_M55_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : En…
5 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
6 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
7 cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : T3…
9 cpu0.semihosting-cmd_line="" # (string, init-time) default = '' : Co…
10 cpu0.semihosting-heap_base=0x0 # (int , init-time) default = '0x0' : Vi…
11 cpu0.semihosting-heap_limit=0x0 # (int , init-time) default = '0x10700000' …
12 cpu0.semihosting-stack_base=0x0 # (int , init-time) default = '0x10700000' …
[all …]
DARM_VHT_Corstone_310_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
7 # (bool , init-time) default = '0' : Enable/disable visualisation
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
11 #cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : T…
12 #cpu0.semihosting-cmd_line="" # (string, init-time) default = '' : C…
13 #cpu0.semihosting-heap_base=0x0 # (int , init-time) default = '0x0' : V…
14 #cpu0.semihosting-heap_limit=0x0 # (int , init-time) default = '0x10700000'…
15 #cpu0.semihosting-stack_base=0x0 # (int , init-time) default = '0x10700000'…
[all …]
DARMCA7neon_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 motherboard.vis.disable_visualisation=1 # (bool , init-time) default = '0' : En…
5 cluster.cpu0.vfp-present=1 # (bool , init-time) default = '1' : Se…
6 cluster.cpu0.ase-present=1 # (bool , init-time) default = '1' : Se…
7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cluster.cpu0.semihosting-hlt-enable=0 # (bool , init-time) default = '0' : En…
9 cluster.cpu0.semihosting-ARM_SVC=0x123456 # (int , init-time) default = '0x123456' : …
10 cluster.cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : Th…
11 cluster.cpu0.semihosting-ARM_HLT=0xF000 # (int , init-time) default = '0xF000' : AR…
12 cluster.cpu0.semihosting-Thumb_HLT=0x3C # (int , init-time) default = '0x3C' : Th…
[all …]
DARMCA5neon_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 motherboard.vis.disable_visualisation=1 # (bool , init-time) default = '0' : En…
5 cluster.cpu0.vfp-present=1 # (bool , init-time) default = '1' : Se…
6 cluster.cpu0.ase-present=1 # (bool , init-time) default = '1' : Se…
7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cluster.cpu0.semihosting-hlt-enable=0 # (bool , init-time) default = '0' : En…
9 cluster.cpu0.semihosting-ARM_SVC=0x123456 # (int , init-time) default = '0x123456' : …
10 cluster.cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : Th…
11 cluster.cpu0.semihosting-ARM_HLT=0xF000 # (int , init-time) default = '0xF000' : AR…
12 cluster.cpu0.semihosting-Thumb_HLT=0x3C # (int , init-time) default = '0x3C' : Th…
[all …]
DARMCA9neon_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 motherboard.vis.disable_visualisation=1 # (bool , init-time) default = '0' : En…
5 cluster.cpu0.vfp-present=1 # (bool , init-time) default = '1' : Se…
6 cluster.cpu0.ase-present=1 # (bool , init-time) default = '1' : Se…
7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 cluster.cpu0.semihosting-hlt-enable=0 # (bool , init-time) default = '0' : En…
9 cluster.cpu0.semihosting-ARM_SVC=0x123456 # (int , init-time) default = '0x123456' : …
10 cluster.cpu0.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xAB' : Th…
11 cluster.cpu0.semihosting-ARM_HLT=0xF000 # (int , init-time) default = '0xF000' : AR…
12 cluster.cpu0.semihosting-Thumb_HLT=0x3C # (int , init-time) default = '0x3C' : Th…
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_bayes_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_class_marks_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_convolution_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_svm_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_fir_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_sin_cos_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_dotproduct_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_fft_bin_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_signal_converge_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_variance_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_graphic_equalizer_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_linear_interp_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Examples/ARM/arm_matrix_example/
DARMCM55_FP_MVE_config.txt2 # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
5 cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : di…
6 cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : mu…
7 … # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off…
8 cpu0.FPU=1 # (bool , init-time) default = '1' : Se…
9 cpu0.MVE=2 # (int , init-time) default = '0x1' : Se…
10 cpu0.SAU=0 # (int , init-time) default = '0x8' : Nu…
11 cpu0.SECEXT=1 # (bool , init-time) default = '1' : Wh…
12 cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' …
[all …]
/cmsis-dsp-latest/Documentation/Doxygen/
Ddsp.dxy.in30 # file that follow. The default is UTF-8 which is also the encoding used for all
34 # The default value is: UTF-8.
42 # The default value is: My Project.
79 # The default value is: NO.
86 # directories at level 8 which is the default and also the maximum value. The
89 # Minimum value: 0, maximum value: 8, default value: 8.
98 # The default value is: NO.
113 # The default value is: English.
120 # The default value is: YES.
129 # The default value is: YES.
[all …]

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