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/Zephyr-latest/drivers/pwm/
Dpwm_npcx.c93 uint32_t dcr; in pwm_npcx_set_cycles() local
129 dcr = (pulse_cycles / prescaler) - 1; in pwm_npcx_set_cycles()
132 data->cycles_per_sec / period_cycles, prsc, ctr, dcr); in pwm_npcx_set_cycles()
141 inst->DCR = dcr; in pwm_npcx_set_cycles()
149 inst->DCR = dcr; in pwm_npcx_set_cycles()
Dpwm_ite_it8xxx2.c166 * calculate DCR in pwm_it8xxx2_set_cycles()
/Zephyr-latest/drivers/i3c/
Di3c_common.c459 struct i3c_ccc_getdcr dcr = {0}; in i3c_device_basic_info_get() local
482 ret = i3c_ccc_do_getdcr(target, &dcr); in i3c_device_basic_info_get()
528 target->dcr = dcr.dcr; in i3c_device_basic_info_get()
682 deftgts->active_controller.dcr = config_target.dcr; in i3c_bus_deftgts()
691 deftgts->targets[n].dcr = i3c_desc->dcr; in i3c_bus_deftgts()
832 LOG_DBG("Target 0x%02x, BCR 0x%02x, DCR 0x%02x, MRL %d, MWL %d, IBI %d", in i3c_bus_init()
833 desc->dynamic_addr, desc->bcr, desc->dcr, in i3c_bus_init()
Di3c_ccc.c42 struct i3c_ccc_getdcr *dcr) in i3c_ccc_do_getdcr() argument
49 __ASSERT_NO_MSG(dcr != NULL); in i3c_ccc_do_getdcr()
53 ccc_tgt_payload.data = &dcr->dcr; in i3c_ccc_do_getdcr()
54 ccc_tgt_payload.data_len = sizeof(dcr->dcr); in i3c_ccc_do_getdcr()
Di3c_shell.c218 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
264 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
757 struct i3c_ccc_getdcr dcr; in cmd_i3c_ccc_getdcr() local
765 ret = i3c_ccc_do_getdcr(desc, &dcr); in cmd_i3c_ccc_getdcr()
771 shell_print(sh, "DCR: 0x%02x", dcr.dcr); in cmd_i3c_ccc_getdcr()
772 desc->dcr = dcr.dcr; in cmd_i3c_ccc_getdcr()
Di3c_npcx.c112 #define DAA_TGT_INFO_SZ 0x8 /* 8 bytes = PID(6) + BCR(1) + DCR(1) */
1355 /* Receive Provisioned ID, BCR and DCR (total 8 bytes) */ in npcx_i3c_do_daa()
1407 target->dcr = rx_buf[7]; in npcx_i3c_do_daa()
2524 SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_DCR, config_target->dcr); in npcx_i3c_apply_target_config()
3040 .config_target.dcr = DT_INST_PROP_OR(id, dcr, 0), \
Di3c_stm32.c1593 uint8_t dcr; in i3c_stm32_event_isr_tx() local
1598 dcr = data->pid & 0xFF; in i3c_stm32_event_isr_tx()
1621 target->dcr = dcr; in i3c_stm32_event_isr_tx()
Di3c_cdns.c385 #define DEV_ID_RR2_DCR(dcr) (dcr) argument
1562 uint8_t dcr = dev_id_rr2 & 0xFF; in cdns_i3c_do_daa() local
1576 target->dcr = dcr; in cdns_i3c_do_daa()
1973 * primary controller. When assigned through ENTDAA, the dynamic address, bcr, dcr, and pid in cdns_i3c_attach_device()
2033 DEV_ID_RR2_DCR(desc->dcr); in cdns_i3c_reattach_device()
Di3c_mcux.c1222 /* Loop to grab data from devices (Provisioned ID, BCR and DCR) */ in mcux_i3c_do_daa()
1279 target->dcr = rx_buf[7]; in mcux_i3c_do_daa()
/Zephyr-latest/dts/riscv/ite/
Dit8xxx2.dtsi556 reg = <0x00f01802 1 /* DCR */
567 reg = <0x00f01803 1 /* DCR */
578 reg = <0x00f01804 1 /* DCR */
589 reg = <0x00f01805 1 /* DCR */
600 reg = <0x00f01806 1 /* DCR */
611 reg = <0x00f01807 1 /* DCR */
622 reg = <0x00f01808 1 /* DCR */
633 reg = <0x00f01809 1 /* DCR */
/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst93 * BCR and DCR need to be obtained separately to populate
101 its Provisioned ID, BCR, and DCR back. Match the received
108 * Also, set the BCR and DCR fields in the device descriptor
131 basic device information such as BCR, DCR, MRL and MWL.
295 such as, its dynamic address, BCR, DCR, MRL and MWL. Therefore,
/Zephyr-latest/dts/bindings/i3c/
Dnuvoton,npcx-i3c.yaml88 dcr:
/Zephyr-latest/drivers/sensor/nxp/mcux_lpcmp/
Dmcux_lpcmp.c95 config->base->DCR |= LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
97 config->base->DCR &= ~LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
223 val->val1 = (int32_t)((config->base->DCR) & in mcux_lpcmp_attr_get()
/Zephyr-latest/include/zephyr/drivers/i3c/
Dtarget_device.h73 /** Device Characteristics Register (DCR). */
74 uint8_t dcr; member
Dccc.h408 uint8_t dcr; member
432 uint8_t dcr; member
533 uint8_t dcr; member
1391 * @brief Get DCR from a target
1393 * Helper function to get DCR (Device Characteristic Register) from
1397 * @param[out] dcr Pointer to the DCR payload structure.
1402 struct i3c_ccc_getdcr *dcr);
/Zephyr-latest/soc/nuvoton/npcx/common/
Dregisters.c49 NPCX_REG_OFFSET_CHECK(pwm_reg, DCR, 0x006);
/Zephyr-latest/include/zephyr/drivers/
Di3c.h1008 * Device Characteristic Register (DCR)
1013 uint8_t dcr; member
/Zephyr-latest/soc/nuvoton/npcx/common/reg/
Dreg_def.h472 volatile uint16_t DCR; member