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/Zephyr-latest/soc/neorv32/
Dsoc_irq.S18 * clearing a pending IRQ. Instead we disable the IRQ in the MIE CSR and
19 * re-enable it (if it was enabled when clearing).
/Zephyr-latest/dts/bindings/i2c/
Despressif,esp32-i2c.yaml25 if the target SoC does not have support in hardware for clearing
32 if the target SoC does not have support in hardware for clearing
/Zephyr-latest/drivers/serial/
DKconfig.stm3235 setting/clearing DMAT bit".
/Zephyr-latest/modules/hal_nordic/nrf_802154/sl_opensource/platform/
Dnrf_802154_irq_zephyr.c42 /* Zephyr does not provide abstraction layer for clearing pending IRQ */ in nrf_802154_irq_clear_pending()
/Zephyr-latest/dts/bindings/sensor/
Dmaxim,max17262.yaml42 description: The voltage level for clearing empty detection in mV (default 3880)
/Zephyr-latest/drivers/hwinfo/
Dhwinfo_rw61x.c12 /* Because of the ROM clearing the reset register and using scratch register
Dhwinfo_ambiq.c120 * INFO1 space even upon clearing RSTGEN->STAT in z_impl_hwinfo_clear_reset_cause()
/Zephyr-latest/modules/hal_nordic/nrfs/dvfs/
Dld_dvfs.h24 * @brief Function for clearing the zero bias
/Zephyr-latest/dts/bindings/fpga/
Dlattice,ice40-fpga-bitbang.yaml37 Register address for clearing a GPIO.
/Zephyr-latest/drivers/clock_control/
Dclock_control_renesas_cpg_mssr.h79 /* Software Reset Clearing Register offsets */
99 /* Software Reset Clearing Register offsets */
/Zephyr-latest/doc/services/storage/stream/
Dstream_flash.rst27 The Stream Flash module offers an API for loading, saving and clearing stream
/Zephyr-latest/lib/utils/
Dnotify.c72 /* Mark completion by clearing the flags field to the in sys_notify_finalize()
/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_uart.h47 #define MCHP_UART_FCR_CLR_RX_FIFO 0x02u /* Clear RX FIFO, bit is self-clearing */
48 #define MCHP_UART_FCR_CLR_TX_FIFO 0x04u /* Clear TX FIFO, bit is self-clearing */
Dmec_pwm.h28 * Enable and start PWM. Clearing this bit resets internal counters.
/Zephyr-latest/include/zephyr/arch/common/
Dffs.h61 * by first clearing all but the lowest set bit. in find_lsb_set()
/Zephyr-latest/subsys/bluetooth/mesh/
Dheartbeat.c314 /* Only an explicit address change to unassigned should trigger clearing in bt_mesh_hb_sub_set()
332 /* Clearing the period should stop heartbeat subscription in bt_mesh_hb_sub_set()
333 * without clearing the parameters, so we can still read them. in bt_mesh_hb_sub_set()
/Zephyr-latest/drivers/timer/
Darcv2_timer0.c168 * - reprogramming of LIMIT must be clearing the COUNT
169 * - ISR must be clearing the 'overflow_cycles' counter.
320 * between cycle_count and clearing 0, few cycles are possible in sys_clock_set_timeout()
/Zephyr-latest/boards/renesas/rcar_salvator_x/support/
Dopenocd.cfg34 # Software Reset Clearing Register 2 Bit(22) Arm Realtime core
/Zephyr-latest/arch/arm/core/cortex_m/
Disr_wrapper.c44 * non-tickless idle, this ensures that the clearing of the kernel idle in _isr_wrapper()
/Zephyr-latest/drivers/usb_c/tcpc/
Ducpd_stm32_priv.h43 * @brief UCPD alert mask used for clearing alerts
62 * @brief UCPD alert mask used for clearing alerts
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/
Dproxy.rst50 :ref:`bluetooth_mesh_srpl_srv`, provide the functionality of saving and clearing SRPL entries. A
/Zephyr-latest/arch/x86/core/
Dcache.c35 /* Enable write-back caching by clearing the NW and CD bits */ in arch_dcache_enable()
/Zephyr-latest/drivers/watchdog/
Dwdt_dw.c124 * Once watchdog is enabled by setting WDT_EN bit watchdog cannot be disabled by clearing
221 * Clearing interrupt here will not assert system reset, so interrupt
/Zephyr-latest/drivers/dai/intel/dmic/
Ddmic_nhlt.h57 * by the driver just by clearing CIC_CONTROL.SOFT_RESET bit.
/Zephyr-latest/dts/bindings/memory-controllers/
Drenesas,ra-sdram.yaml129 - TREFW: Auto-Refresh Cycle/Self-Refresh Clearing Cycle Count Setting.

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